Actas JP2011 - Universidad de La Laguna

Actas XXII Jornadas de Paralelismo (JP2011) , La Laguna, Tenerife, 7-9 septiembre 2011peticiones hacia donde la red conoce bien la últimaubicación del dato o bien la más cercana, dependiendode la acción a realizar.Por último, sigue abierta la posibilidad de añadirfuncionalidades de filtrado, evitando el envío demensajes hacia regiones donde la red podría conocer queno se encuentra el dato requerido.[17] SPEC Standard Performance Evaluation Corporation, “SPEC2006.”AGRADECIMIENTOSEl presente trabajo ha sido financiado mediante elproyecto MICINN TIN2010-18159 y la red deexcelencia europea HiPEAC.REFERENCIAS[1] D. Vantrease and N. Binkert, “Atomic Coherence : LeveragingNanophotonics to Build Race-Free Cache CoherenceProtocols,” HPCA - 17 2011 The Seventeenth InternationalSymposium on High-Performance Computer Architecture, 2011,pp. 132-143.[2] M. Zhang, A.R. Lebeck, and D.J. Sorin, “Fractal Coherence:Scalably Verifiable Cache Coherence,” 2010 43rd AnnualIEEE/ACM International Symposium on Microarchitecture,Dec. 2010, pp. 471-482.[3] L.N. Bhuyan and H. Wang, “Switch MSHR : A Technique toReduce Remote Read Memory Access Time in CC-NUMAMultiprocessors,” IEEE Comput. Soc, vol. 52, 2003, pp. 1-16.[4] M.M.K. Martin, D.J. Sorin, A. Ailamaki, A.R. Alameldeen,R.M. Dickson, C.J. Mauer, K.E. Moore, M. Plakal, M.D. Hill,and D.A. Wood, “Timestamp Snooping : An Approach forExtending SMPs,” ASPLOS-IX - Architetural Support forProgramming Languages and Operating Systems, 2000, pp. 1-12.[5] N. Agarwal, L.-S. Peh, and N.K. Jha, “In-Network SnoopOrdering (INSO): Snoopy coherence on unorderedinterconnects,” 2009 IEEE 15th International Symposium onHigh Performance Computer Architecture, Feb. 2009, pp. 67-78.[6] N. Eisley, L.-S. Peh, and L. Shang, “In-Network CacheCoherence,” International Symposium on Microarchitecture,2006.[7] N.D. Enright Jerger, L.-S. Peh, and M.H. Lipasti, “Virtual treecoherence: Leveraging regions and in-network multicast treesfor scalable cache coherence,” 2008 41st IEEE/ACMInternational Symposium on Microarchitecture, Nov. 2008, pp.35-46.[8] N. Agarwal, L.-shiuan Peh, and N.K. Jha, “In-NetworkCoherence Filtering : Snoopy Coherence without Broadcasts,”Ieee Micro, 2009.[9] M.M.K. Martin, M.D. Hill, and D.A. Wood, “Token Coherence:a new framework for shared-memory multiprocessors,” IeeeMicro, vol. 23, 2003, pp. 108-116.[10] Virtutech, “Simics : A Full System Simulation Platform,” IEEE,2002.[11] M.M.K. Martin, D.J. Sorin, B.M. Beckmann, M.R. Marty, M.Xu, A.R. Alameldeen, K.E. Moore, M.D. Hill, and D.A. Wood,“Multifacet’s General Execution-driven MultiprocessorSimulator (GEMS) Toolset,” Computer Architecture News,2005.[12] V. Puente, J.A. Gregorio, and R. Beivide, “SICOSYS: AnIntegrated Framework for Studying Interconnection NetworkPerformance in Multiprocessor Systems,” IEEE Comput. Soc,2002, pp. 15-22.[13] D.L. Weaver, “The SPARC Architecture Manual,” Control,1994.[14] A.R. Alameldeen, M.M.K. Martin, C.J. Mauer, K.E. Moore, M.Xu, M.D. Hill, D. Wood, and D.J. Sorin, “Simulating a $2MCommercial Server on a $2K PC,” Computer, vol. 36, 2003, pp.50-57.[15] H. Jin, M. Frumkin, and J. Yan, “The OpenMP Implementationof NAS Parallel Benchmarks and its Performance,” NASTechnical Report NAS-99-011, NASA Ames Research Center,Moffett Field, CA, 1999.[16] C. Bienia and K. Li, “PARSEC 2 . 0 : A New Benchmark Suitefor Chip-Multiprocessors,” MoBS, 2009.JP2011-272