Actas JP2011 - Universidad de La Laguna

Actas XXII Jornadas de Paralelismo (JP2011) , La Laguna, Tenerife, 7-9 septiembre 2011vwxst w·x·y s·t·y p·q·y (ijkm) C out0---- 0 - -i = 0(jkm) = (wxy) + C in20101-- - 0 -i = 0(jkm) = (sty) + C in20110-- - - 0 i = 011100 - - 0 (jkm) = (pqy) + C in200---- 1 - -101-- - 1 - i = 1, j = 1 1110-- - - 1 k = C in2 , m = C in211100 - - 1100-- - - - i = y · C in211101 - - - j = y · C in2 111110 - - - k = y · C in211111 - - - m = y ⊕ C in2SWXTVVXVwxyST11WVXFig. 3.Cin24muxvTABLE IIIObtaining (ijkm)0 0 Cin2 w x y0 0 Cin2+1 1 Cin20 0VW+stymux4muxCout3+4muxs t y+muxijkmpqyy Cin2Implementation obtaining ijkm11Cin24yCin20 0 Cin2add the amount of 6 in such a case. This provokesan output carry. In the second step we add the inputcarry to the result of the previous operation.Let (abcd) a generic BCD digit of a BCD-codednumber, and C in and C out the input and outputcarries respectively. The condition for a carrygeneration is c out = a‖(b · c · d) (see [2]), where thesymbol ‖ means the logic OR operation and · is thelogical AND (notice that the carry only depends onthe current digit bits). Thus, the conversion is:Cin0abcdCout1Fig. 4.Cin1efghCout2Cin2ijkmGlobal structure of the conversionmux+0Cout3p q y+First step:c out = a‖(b · c · d) (1){ (abcd) if cout = 0(abcd) =(2)(abcd) + (0110) if c out = 1Second step:(abcd) = (abcd) + c in (3)IV. Direct conversion from DPD to RBCDLet (pqrstuvwxy) the ten bits corresponding to aDPD code. This code is converted to three BCDdigits (abcd)(efgh)(ijkm), in such a way that eachbit of the three BCD digits is obtained as a booleanfunction of the DPD bits. In [1] a table conversion isprovided. On the other hand, conversion from BCDto RBCD is performed by implementation of equations(1) through (3). What we propose is the combinationof the table and the equations to provide adirect table conversion, which is presented in tablesI, II and III. The resulting BCD code is composed bythree digits namely (abcd)(efgh)(ijkm) and they aredirectly obtained from the DPD code (pqrstuvwxy).In the tables the symbol · means the logical ANDoperation, the symbol ⊕ corresponds to the logicalEXOR operation and the symbol + is the arithmeticaddition.From these tables we can see that only logical operationsare required as well as, for some cases, onelevel of 3-bit arithmetic addition to add the inputcarry (for example, in table I for the first case, thebits (bcd) are obtained by the addition of the bits(pqr) and a carry, whereas the bit a=0. Notice thatthe maximum value of (bcd) is 6 and thus the additionof a carry never provokes an output carry). Nevertheless,the BCD to RBCD conversion proposedin [2] involves two additions.The implementation of the direct conversion isshown in Fig. 1,Fig. 2 and Fig. 3 which are relatedto Tables I, II and III respectively. The implementationof Table I requires the use of only twomultiplexers and one 3-bit adder, while the implementationof Table II uses four multiplexers and two3-bit parallel adders, and the implementation of TableIII uses six multiplexers and three 3-bit paralleladders.Fig. 4 shows the global structure of the full conversion.The C in0 is the carry input coming fromthe previous conversion, and the C out3 is the carryoutput produced by the current conversion.V. Experimental resultsThe DPD to RBCD design presented in this paperhave been implemented in Verilog, simulated usingModelSim 6.0, and synthesized using Synopsys DesignCompiler and the TSMC 65nm library in whichone cell unit has an area equal to 1 µm 2 . Also,we have implemented the conversion using two steps(conversion from DPD to BCD [1] plus conversionfrom BCD to RBCD [2]). Table IV shows the implementationresults. Our approach is close to 27%JP2011-275