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0.<br />

16-2<br />

combincd analog and digital proccssing technologics<br />

providcd thc most cfficicnt implcmcntation for dcmodulat-<br />

ing thc LDR uplink wavcform. As shown in Fig. 5. thc<br />

frcqucncy dcmcdulation was pcrformcd by a siirfacc<br />

acoustic wave (SAW) dcmodulator followcd by a digital<br />

communications and acquisition proccssor. Now howcvcr.<br />

thc progrcssion of digital tcchnology has advanccti the<br />

staic-of-thc-nrt to thc pint whcrc an all digital approach<br />

is morc cfficicnt. Thc dcvclopmcnt of application spccific<br />

ICs (ASICs) which proccss thc st'mdard EHF waveforms<br />

will contribute significantly to thc rcduction in wcight and<br />

powcr rcquircd by thcsc subsystcms. For furthcr rcduc-<br />

tions in wcight and powcr, thc ASIC dcviccs c h be<br />

intcgatcd into multi-chip modulcs to achicvc ths bcticfits<br />

associated with a wafcr-scalc lcvcl of intcgration as shown<br />

in Fig. 5. In this comparison of zn LDR signal processor<br />

using multichip moclulcs with an I,DR signal procbssor<br />

from thc carly 1960's. an ordcr of magnitudc rcduction iii<br />

wcight is obtaincd while thc powcr is dccrcasrd by inorc<br />

than half for thc samc nlirnbcr or chanricls pmccsscd<br />

The digital Fast Fouricr 'Transform (FFT) dcmodulator is<br />

implcmcntcd wiih two ASIC dcsigns shown in Fig. 6. Thc<br />

samplcd signals arc first prcproccsscd bcforc ihc actud<br />

transform is pcrformcd. In this FIT prcproccssor chip, Ihc<br />

signals arc windowcd. cohcrcntly intcgratcd for iidjusimcnt<br />

of frcqucncy sample spacing, and storcd in mcniory. Thc<br />

hcart of thc dcmodulator is thc in-placc FFT rnip shown<br />

in Fig. 6. Thc data is storcd in mcniory, thc FrT buttcifly<br />

opcrations arc pcrformcd. and aftcr the transform is<br />

coniplctcd. thc 1 and Q sam~!ia arc coltvcrtcd to inagni-<br />

~udc valucs Tor Turthcr prr-cssing by thc uplink processor.<br />

Thc F1.T chip is dcsigncd for usc with (lata or :rccluisitiori<br />

channcls and can pcrfomi a traiisiorrn of up to 256 points.<br />

Thc ASIC for thc in-placc FFT, shown in Fig. 7,' has bccn<br />

dcsigncd, fabricatcd, and tcstcd. Thc FFT ASIC is<br />

dcsigncd to mcci thc priniary rcquircmcnts for a spacc<br />

applicatitm: radiation hardncss, high pcrfnniiancc, low<br />

powcr ccmsumption. mid high rcliability. A significant<br />

dcsign fcaturc in this chip which cnahlcs high pcrfonnancc<br />

in a low powcr configuration is [tic usc of on-chip rnchiory<br />

(RAM and ROM) for thc data bcing proccssctl arid fdr thc<br />

cbcfficicnts uscd in thc FlT. Thc amount of riiciiiory<br />

rcquircd is mininiizcd by employing an innovativc in-place<br />

algorithm using dual port RAM.<br />

Thc Fm chip, thc prcproccssor chip, and a coniniutiications<br />

uplink proccssor (CUP) ASiC can bc confiuurcd into<br />

a comrnunicaiions dcmodulator, which is capablt: of<br />

proccssing up to 16 channcls, as shown in Fig. 8. Thcsc<br />

ASICs, along with thc supprting chips (AA1 cnnvcrtcrs.<br />

CUP RAM, and mission ROM) can be packagcd irito a<br />

multichip modulc which is about 2" x 3" in six.<br />

A<br />

For MDR channcls, similar ASIC tcchnology is cxpcctcd'<br />

to yicld cfficicnt imp:cmcntations for thcsc higher data ratc ,<br />

channcls wcll. A prclirninary dcsign Tor a four channcl ,<br />

MDR subsystcm rcquircs thrcc individual ASIC dcsigns,,<br />

Four dcmodulator chips arc utilizcd in conjunction with a<br />

clock gcncrator chip and an MUR prcrccssor chip to form<br />

thc four channcl MUR suhsystcm. l'hc dcsigris for ihc<br />

clock Rcncrator chip onti thc MI1R pr(tccs?qr, $hip ollow<br />

cascading to support additional MDR dcm,wI,ulatyrs for . .. a*<br />

payloads with mwc than four channcls. , ... . ..' a,.<br />

..<br />

6. EXAMPLE EHF PAYLOAD FOR<br />

GEOSYNCHRONOUS ORBITS<br />

An cxample EHF payload, which utilizcs a pair of variable<br />

beamwidth spot bcam antcmias and bah LDR and MDR<br />

signal processing, is shown in Fig. 9. For this example<br />

payload, the uplink spot bcam antennas utilize 7 fceds<br />

cacli and the downlink bcams arc formcd using 1 ked<br />

each. Both LDR and MDR channcls are supportcd in the<br />

spot hams. In addition. the payload providcs LDR c h<br />

covcragc senticc through a pair of carth covcragc horns.<br />

The LDR proczssor supports 16 communications channcls<br />

in each of the bcams using thc EHF common transmission<br />

format. Thc MDR proccssor providcs a total of 4 channels<br />

of scrvicc in thc spat bcams with any mix bctwccn<br />

the two beams.<br />

Thc main coasidcrations in sclccling a spot bcam sizc arc<br />

thc rcquircd gain and llrc covcragc arca prtwidcd by the<br />

ham. Thc 1" :o 3" spot bcam sim in this cxamplc pay-<br />

load, along with thc 6 W solid statc transmittcr. will<br />

support 2.4 kbps scrvicc lo a small tcrminal (2'nw) whilc<br />

in thc widc bcam mode and will support 1 Mbps links to<br />

a mcdium si7x tcrminal (4'/12W) whilc in thc narrow<br />

bcam niodc. Thc payload in Fig. 9 is cstimatcd to wcigh<br />

about 200 Ib and rcquire about 290 W (thcsc cstimatcs in-<br />

cludc 20% margins).<br />

Thc 6 W transmittcr and thc 20 spot bcam antcnnas<br />

providc sufficient EIRP to support both LDR and MDR<br />

links in a varicty of modcs and daia ratcs with the total<br />

throughput for thc payload dcpcnding on thc mix of LDR<br />

and MOR bxnirials in a sccnario. An cxainplc loading<br />

scciiario is shown in Fig. IO. For this cxariiplc. thrcc<br />

typcs or tcrminals wcrc assunicd: a 6', 25 W ground<br />

tcrniinal; a 4', 12 W transpnrtablc tcrminal: and a 2', 2 W<br />

portablc tcrniinal. Thc ground tcrminal is supported by thc<br />

carth covcragc bcani in thc cxarnplc. Thc portable and<br />

transportablc tcrniinals arc supportcd in thc spot hcanis.<br />

Chc of thc spot bcmns is sct to a 3" bcainwidth (ahut<br />

1200 milc diarnctcr covcragc at thc subsatcllitc point)<br />

whilc thc othcr :pot bcam is sct to a 1" bcamwidth (about<br />

400 milc dianctcr covcragc ai thc subs:itcllitc point). in<br />

this cxamplc. 27 LDR networks and 17 MDR links arc<br />

supportcd for a total payload throughput of 3277 kbps.<br />

A range of payload capabilities can bc implcmcntd using<br />

the variablc hamwidth aitcnnas. nulling prtxxssors. and<br />

ttic othcr kcy tcchnologics dcscribd bricfly in Fig. 1 and<br />

2. Thcsc tcchnologics can bc uscd to implcnicnt small<br />

EHF payloads as in thc cxamplc prescntcd hcrc. Howcva.<br />

thc samc tcchnologics can also bc uscd in sccondiiry anti-<br />

jam payloads or multiple function anti-jam payloads on<br />

largc satcllitcs as shown in Fig. 11. In addition. many of<br />

thc smc signal processing and frcqucncy gcncration<br />

tcchnologics arc applicablc for improving El IF tcrniinals<br />

as wcll.<br />

7. SUMMAHY<br />

A kcy fcaturc fur thc flcxiblc usc of Ihc EHF payload is to<br />

providc thc ability to configurc the payload to providc a<br />

varicty of scrviccs. Suppming cithcr LDR. MDK. or both<br />

typcs of chonncls in a varinlk. hciunwitlth utitcririn ticllm<br />

provitlc itiis sort of flcxihility to nwct a troiitl raiigc of<br />

uscr rcquircmcnts. Dcvclopmcnt of the critical technologics<br />

for use in thcsc typcs of payloads hiLC bocn initiatcd.<br />

Thc tcchnology arcas includc variable bmwidth antcnnas.<br />

lightwcighl frcqucncy synthcsi7~~i!.,and high spccd signal<br />

processors for both LDR and MDR channcls.

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