Script for Laboratory: Designing embedded ASIPs - CES
Script for Laboratory: Designing embedded ASIPs - CES
Script for Laboratory: Designing embedded ASIPs - CES
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Table of contents<br />
1 Introduction.......................................................................4<br />
1.1 Application specific instruction set processors.............................4<br />
1.2 Goal of the laboratory...................................................................5<br />
2 Working Environment .....................................................6<br />
2.1 Network structure .........................................................................6<br />
2.2 Basic UNIX Commands/Programs...............................................6<br />
2.3 Directory Structure .....................................................................11<br />
2.4 Text editors.................................................................................16<br />
3 Dlxsim ..............................................................................17<br />
3.1 The DLX architecture.................................................................17<br />
3.2 Extending dlxsim........................................................................22<br />
3.2.1 Configuring dlxsim.......................................................................................................22<br />
3.2.2 How to add a new instruction .......................................................................................24<br />
3.2.3 How to add a new instruction-<strong>for</strong>mat ...........................................................................25<br />
3.3 Using dlxsim...............................................................................26<br />
3.3.1 Statistics........................................................................................................................28<br />
3.3.2 Debugging with dlxsim ................................................................................................29<br />
4 ASIP Meister ...................................................................32<br />
4.1 Typical challenges while working with ASIP Meister ...............32<br />
4.2 Typical Error Messages and their solutions................................33<br />
4.3 Tutorial <strong>for</strong> the “Flexible Hardware Model” (FHM)..................35<br />
4.4 Multi cycle FHMs ......................................................................40<br />
4.5 General hints about FHMs..........................................................43<br />
5 ModelSim.........................................................................45<br />
5.1 Tutorial.......................................................................................45<br />
5.1.1 Create a new ModelSim Project ...................................................................................45<br />
5.1.2 Include the testbench and ASIP Meister CPU files ......................................................46<br />
5.1.3 Compile the project ......................................................................................................47<br />
5.1.4 Run the simulation........................................................................................................48<br />
5.1.5 Statistics of the simulation............................................................................................50<br />
5.2 General hints...............................................................................52<br />
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