Script for Laboratory: Designing embedded ASIPs - CES

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• Always have a look at the printed warnings when dlxsim runs the simulation. At the end of every simulation the warnings are summarized, i.e. the number of the printed warnings is shown. If the simulations aborts before its usual end this summary is not printed. To see the summary you can see them in the statistics with “stats warnings”. Changing the source code to find the bug: • When your CoSy compiled program is not running as expected then there are different possible steps to find the problem. First, you should try to locate which code is causing the problem. Therefore, you should find a minimal C-code that still causes the problem. The further steps are much easier when the created assembly code is as small as possible. • You have to understand, what the assembly code is doing to find and understand the error. The output of a compiler is usually very difficult to read and to understand. Sometimes it is very helpful to use SINAS (Support for Inline Assembly) to make the code more readable. With SINAS, you can add your own assembler instructions or comments to the created assembly code. With SINAS, you can also force the compiler not to rearrange the created assembly code for optimizations. For example: asm int addComment() { @[.barrier] ; COMMENT: Between the i- and the j-loop } void main() { for (int i=0; i
addComment1(); functionY(); addComment2(); } Mighty things can be done with those macros. Another example: #define ADD_COMMENT_STRING (NUMBER, STRING) \ asm void addComment ## NUMBER() { \ @[.barrier] \ ; COMMENT: STRING \ } ADD_COMMENT_STRING(3, “between X and Y”) ADD_COMMENT_STRING(4, “after Y”) void main() { functionX(); addComment3(); functionY(); addComment4(); } - 31 -
Page 1 and 2: Laboratory: “Designing Applicatio
Page 3 and 4: 6 Validating the CPU in Prototyping
Page 5 and 6: Figure 1-1 GPPs, ASIPs and ASICs [H
Page 7 and 8: • Command line interpreter Intera
Page 9 and 10: i. Copying files: the cp command co
Page 11 and 12: . Copying via ssh: Not all machines
Page 13 and 14: dlx_basis Applications ModelSim mei
Page 15 and 16: makeCoSy contCoSy Filename Explanat
Page 17 and 18: 3 Dlxsim Dlxsim [DLX-Package] is an
Page 19 and 20: Successful Successful dissolving di
Page 21 and 22: Instruction Description Instruction
Page 23 and 24: Option Description -dbb# (Debug Bas
Page 25 and 26: Instruction Format Parameters NO_AR
Page 27 and 28: Command Description stop {options}
Page 29: 3.3.2 Debugging with dlxsim This ch
Page 33 and 34: • If you manually want to write a
Page 35 and 36: 4.3 Tutorial for the “Flexible Ha
Page 37 and 38: in direction; The in keyword means
Page 39 and 40: amount : in std_logic_vector(7 down
Page 41 and 42: Add the three signals to the contro
Page 43 and 44: data_in : in std_logic_vector($W1 d
Page 45 and 46: 5 ModelSim ModelSim is a full-featu
Page 47 and 48: 5.1.3 Compile the project Figure 5-
Page 49 and 50: Mark the wave.do file in your Model
Page 51 and 52: Figure 5-6 ModelSim waves Signal Ex
Page 53 and 54: • Always invoke ModelSim in the s
Page 55 and 56: If you don’t already have a proje
Page 57 and 58: CPU VHDL Files have been generated
Page 59 and 60: After the TestData-files for your a
Page 61 and 62: However, you can’t force the synt
Page 63 and 64: Timing (Timing Analyzer)” will op
Page 65 and 66: 7 Power estimation In this tutorial
Page 67 and 68: - Start the simulation (Simulate/ s
Page 69 and 70: 8 CoSy compiler The CoSy compiler d
Page 71 and 72: When you manually have to fix some
Page 73 and 74: of the makeCoSy script. If an error
Page 75 and 76: the automatically generated compile
Page 77 and 78: instruction, as different custom in
Page 79 and 80: Directive Explanation .restrict .ch
Page 81 and 82:
Now we will demonstrate how you can
Page 83 and 84:
the user changes the value of the b
Page 85 and 86:
• Huge decrease of cycle count
Page 87 and 88:
of instructions together it might t
Page 89 and 90:
Table of Figures Figure 1-1 GPPs, A
Page 91:
References [CES] Homepage of the Ch
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