Script for Laboratory: Designing embedded ASIPs - CES

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Table of contents 1 Introduction.......................................................................4 1.1 Application specific instruction set processors.............................4 1.2 Goal of the laboratory...................................................................5 2 Working Environment .....................................................6 2.1 Network structure .........................................................................6 2.2 Basic UNIX Commands/Programs...............................................6 2.3 Directory Structure .....................................................................11 2.4 Text editors.................................................................................16 3 Dlxsim ..............................................................................17 3.1 The DLX architecture.................................................................17 3.2 Extending dlxsim........................................................................22 3.2.1 Configuring dlxsim.......................................................................................................22 3.2.2 How to add a new instruction .......................................................................................24 3.2.3 How to add a new instruction-format ...........................................................................25 3.3 Using dlxsim...............................................................................26 3.3.1 Statistics........................................................................................................................28 3.3.2 Debugging with dlxsim ................................................................................................29 4 ASIP Meister ...................................................................32 4.1 Typical challenges while working with ASIP Meister ...............32 4.2 Typical Error Messages and their solutions................................33 4.3 Tutorial for the “Flexible Hardware Model” (FHM)..................35 4.4 Multi cycle FHMs ......................................................................40 4.5 General hints about FHMs..........................................................43 5 ModelSim.........................................................................45 5.1 Tutorial.......................................................................................45 5.1.1 Create a new ModelSim Project ...................................................................................45 5.1.2 Include the testbench and ASIP Meister CPU files ......................................................46 5.1.3 Compile the project ......................................................................................................47 5.1.4 Run the simulation........................................................................................................48 5.1.5 Statistics of the simulation............................................................................................50 5.2 General hints...............................................................................52 - 2 -
6 Validating the CPU in Prototyping Hardware.............54 6.1 Creating the ISE Project .............................................................54 6.2 Synthesizing and implementing the ISE project.........................57 6.3 Initializing the software and uploading to the prototyping board...........................................................................................58 6.3.1 Hardware specific limitations of the application ..........................................................60 6.4 Getting the accurate area and delay reports ................................60 6.5 Getting the critical path report....................................................62 7 Power estimation.............................................................65 7.1 Different types of power.............................................................65 7.2 Estimating the power consumption ............................................66 7.2.1 Generate the value change dump file using ModelSim ................................................66 7.2.2 Generating the power report using xPower ..................................................................67 7.2.3 Visualize the power report using CosmosScope...........................................................68 8 CoSy compiler .................................................................69 8.1 Basics about retargetable compilers ...........................................69 8.2 Creating the CoSy compiler .......................................................70 8.2.1 Structure of a CoSy rule ...............................................................................................71 8.2.2 Typical problems while creating the CoSy compiler....................................................72 8.3 Using the CoSy compiler............................................................73 8.3.1 Typical reasons why a special instruction is not automatically used............................75 8.3.2 Typical problems while using the CoSy compiler........................................................76 8.4 Support for Inline Assembly (SINAS) .......................................76 8.5 Library with standard functions for ASIP Meister / CoSy / Hardware Prototype....................................................................80 8.5.1 Functions of the LCD library........................................................................................81 9 Custom instruction identification..................................84 9.1 What is a custom instruction ......................................................84 9.2 Speedup calculation....................................................................86 9.3 How to use gprof ........................................................................88 Table of Figures..............................................................................89 References.......................................................................................91 - 3 -
Page 1: Laboratory: “Designing Applicatio
Page 5 and 6: Figure 1-1 GPPs, ASIPs and ASICs [H
Page 7 and 8: • Command line interpreter Intera
Page 9 and 10: i. Copying files: the cp command co
Page 11 and 12: . Copying via ssh: Not all machines
Page 13 and 14: dlx_basis Applications ModelSim mei
Page 15 and 16: makeCoSy contCoSy Filename Explanat
Page 17 and 18: 3 Dlxsim Dlxsim [DLX-Package] is an
Page 19 and 20: Successful Successful dissolving di
Page 21 and 22: Instruction Description Instruction
Page 23 and 24: Option Description -dbb# (Debug Bas
Page 25 and 26: Instruction Format Parameters NO_AR
Page 27 and 28: Command Description stop {options}
Page 29 and 30: 3.3.2 Debugging with dlxsim This ch
Page 31 and 32: addComment1(); functionY(); addComm
Page 33 and 34: • If you manually want to write a
Page 35 and 36: 4.3 Tutorial for the “Flexible Ha
Page 37 and 38: in direction; The in keyword means
Page 39 and 40: amount : in std_logic_vector(7 down
Page 41 and 42: Add the three signals to the contro
Page 43 and 44: data_in : in std_logic_vector($W1 d
Page 45 and 46: 5 ModelSim ModelSim is a full-featu
Page 47 and 48: 5.1.3 Compile the project Figure 5-
Page 49 and 50: Mark the wave.do file in your Model
Page 51 and 52: Figure 5-6 ModelSim waves Signal Ex
Page 53 and 54:
• Always invoke ModelSim in the s
Page 55 and 56:
If you don’t already have a proje
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CPU VHDL Files have been generated
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After the TestData-files for your a
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However, you can’t force the synt
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Timing (Timing Analyzer)” will op
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7 Power estimation In this tutorial
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- Start the simulation (Simulate/ s
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8 CoSy compiler The CoSy compiler d
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When you manually have to fix some
Page 73 and 74:
of the makeCoSy script. If an error
Page 75 and 76:
the automatically generated compile
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instruction, as different custom in
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Directive Explanation .restrict .ch
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Now we will demonstrate how you can
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the user changes the value of the b
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• Huge decrease of cycle count
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of instructions together it might t
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Table of Figures Figure 1-1 GPPs, A
Page 91:
References [CES] Homepage of the Ch
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