Data Sheet - Freescale Semiconductor

2.6 Dynamic electrical characteristics - DSI3
V BUS_I_L ≤ (V BUS_I - V SS) ≤ V BUS_I_H, T L ≤ T A ≤ T H, ΔT ≤ 12°C/min, unless otherwise specified.
# Characteristic Symbol Min Typ Max Units
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
Reset recovery (all modes, excluding VBUS_I voltage ramp time)
POR to 1st command (Section 3.6)
POR to acceleration data ready (Section 3.6)
Command reception (general)
VHIGH low-pass filter time constant (Section 3.6.1)
VHIGH detection analog delay (Section 3.6.1)
iq low-pass filter time constant (Section 3.6.3)
Command valid time (Section 3.6.1)
Response transmission (general, Section 4.2.3)
Response slew time: 2.0 mA to 10.0 mA, 10.0 mA to 2.0 mA
Response slew time: 4.0 mA to 20.0 mA, 20.0 mA to 4.0 mA
tSLEW1_RESP- tSLEW2_RESP tSLEW1_RESP_Rise- tSLEW2_RESP_Fall Response current activation time: current activated to 50%
Command reception (Discovery Mode)
Command start time (Section 4.1)
Command bit time (Section 4.1)
Command transmission period (Section 4.1)
Command blocking time, Discovery Mode (Section 3.6.1)
ICCQ sample delay time (Section 3.6.3)
ICCQ sample time (Section 3.6.3)
IDISC sample delay time (Section 3.6.3)
IDISC sample time (Section 3.6.3)
Response transmission (Discovery Mode)
Response start delay (Section 4.1)
Response ramp time (Section 4.1)
Response ramp rate (Section 4.1)
Response idle time (Section 4.1)
Response peak current (Section 4.1)
Command reception (Command and Response Mode)
Command bit time (Section 4.2)
Command transmission period (Section 4.2)
Command blocking time, CRM (Section 3.6.1)
Command blocking start time, CRM (Section 3.6.1)
Response transmission (Command and Response Mode)
Response chip time
Response start time (Section 4.2)
Command reception (Periodic Data Collection Mode)
Command bit time (Section 4.3)
Command transmission period (Section 4.3)
Command transmission period resolution
Command blocking time, PDCM (Section 4.3.2)
Command blocking time resolution, PDCM (Section 4.3.2)
Command blocking start time, PDCM (Section 4.3.2)
Command blocking start time, BDM command
Response transmission (Periodic Data Collection Mode)
Response chip time typical (Section 3.1.15.3)
Response chip resolution (Section 3.1.15.3)
Response start time typical (Section 4.3)
Response start time typical, BDM enabled (Section 4.3)
Response start time resolution
t DSI_POR
t DSP_POR
t VHIGH_RC
t VHIGH_Delay
t IQ_RC
t Cmd_Valid
t SLEW1_RESP
t SLEW2_RESP
Δt SLEW
Δt SLEW_rf
t ACT_RESP
t START_DISC
t DISC_BitTime
t PER_DISC
t CmdBlock_DISC
t Disc_Dly
t Disc_Iccqsamp
t IDiscsamp_Dly
t IDiscsamp
t START_DISC_RSP
t DISC_Ramp_RSP
I DISC_Ramp
t DISC_Idle_RSP
I DISC_Peak
t Cmd_BitTime
t PER_CRM
t CmdBlock_CRM
t CmdBlock_ST_CRM
t CHIP_CRM
t START_CRM
t Cmd_BitTime
t PER_PDCM
t PER_PDCM_Res
t CmdBlock_PDCM
t CmdBlockRes_PDCM
t CmdBlock_ST_PDCM
t CmdBlock_ST_BDM
t CHIP_PDCM
t CHIPRes_PDCM
t START_PDCM
t START_PDCM_BDM
t ST_RES_PDCM
MMA27XXW
Sensors
Freescale Semiconductor, Inc. 11
—
—
60
—
200
—
200
200
-100
-250
200
t DSI_POR
—
1000/f OSC
—
—
—
—
—
—
—
—
—
—
—
tPER_PDCM —
—
—
—
5
tDSI_POR 120
—
400
2
400
400
—
—
—
—
16
—
96
48
15
65
31
64
16
1.5
16
2*I RESP
8
—
456
268
5
295
—
—
180
600
600
—
600
600
100
250
400
12
—
—
—
—
—
—
—
—
—
—
—
—
—
8 x tPER_PDCM —
—
—
—
ms
s
μs
ns
μs
μs
ns
ns
ns
ns
ns
ms
μs
s
μs
μs
μs
μs
μs
μs
μs
mA/μs
μs
mA
148
Response transmission (Background Diagnostic Mode)
Response start time (Section 4.3) tSTART_BDM — 20 — μs (7,8)
149 Register write to BUSSW active tBS — 456 — μs (7,8)
150 DSI data latency
OTP program timing
tLAT_DSI — 0.5 6.25 μs (7,9)
151 Time to program the user OTP array tNVM_WRITE_MAX — — 60 ms (7,8)
—
100
—
1
—
—
—
3
—
20
44
—
8
—
5
—
1
20
44
—
0.5
—
—
1
—
5000
—
4095
—
—
—
6.5
—
4095
4095
—
μs
s
μs
μs
μs
μs
μs
μs
μs
μs
μs
μs
μs
μs
μs
μs
μs
μs
(7,8)
(7,8)
(8,9)
(8,9)
(8,9)
(7,9)
(6,8)
(6,8)
(8,9)
(8,9)
(8,9)
(7,8)
(7,8)
(7,8)
(7,8)
(7,9)
(7,9)
(7,9)
(7,9)
(7,8)
(7,8)
(6,8)
(7,8)
(6,8)
(7,8)
(7,8)
(7,8)
(7,8)
(7,8)
(7,8)
(7,8)
(7,8)
(7,8)
(7,8)
(7,8)
(7,8)
(7,8)
(7,8)
(7,8)
(7,8)
(7,8)
(7,8)