Data Sheet - Freescale Semiconductor

4.2.1.1 Bit encoding
Figure 41 shows the bit encoding used for Command and Response Mode commands from the master device.
V HIGH
V LOW
0 0 0 1 1 0 1 1
Figure 41. Command and Response Mode Command bit encoding
4.2.1.2 Command message format
The Command and Response Mode Command format is shown in Table 38.
Table 38. Command and Response Mode - Command Format
Physical address Command Extended Data Register Data CRC
PA[3:0] CMD[3:0] ED[7:0] RD[7:0] CRC[7:0]
Table 39. Command and Response Mode - Field Definitions
Field Length (bits) Definition
PA[3:0] 4
Physical Address
Must match the value in the PADDR[3:0] of the PHYSADDR register
CMD[3:0] 4 Command (reference Section 4.2.4)
ED[7:0] 8 Extended Data (reference Section 4.2.4)
RD[7:0] 8 Register Data (reference Section 4.2.4)
CRC[7:0] 8 Error Checking (reference Section 4.2.1.3)
MMA27XXW
Sensors
Freescale Semiconductor, Inc. 63