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Data Sheet - Freescale Semiconductor

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Once the Discovery Mode is complete, a physical address is assigned to the device, and Command and Response Mode is used<br />

with the assigned physical address for further configuration.<br />

t START_DISC_RSP<br />

MMA27XXW<br />

t DISC_Bittime<br />

= i DISC_Peak<br />

Figure 39. DSI3 Discovery Mode timing diagram<br />

4.2 DSI3 Command and Response Mode<br />

t _DISC_Ramp_RSP<br />

DSI3 Command and Response Mode is the main communication method used for initialization of the device.<br />

4.2.1 DSI3 Command and Response Mode Command reception<br />

t PER_DISC<br />

Command and Response Mode data packets are exchanged between a single master and a single slave. The primary purpose<br />

of command and response transactions are to read from and write to registers within the device memory.<br />

An example Command and Response Mode Command is shown in Figure 40. The command consists of 32 bits of data broken<br />

up into multiple fields as described in Section 4.2.1.2.<br />

BUS_I<br />

Physical Address Command Extended <strong>Data</strong> Register <strong>Data</strong> Error Checking<br />

PA3 PA2 PA1 PA0 C3 C2 C1 C0 D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 E7 E6 E5 E4 E3 E2 E1 E0<br />

0 0 0 1 1 0 0 0 1 0 1 0 1 0 1 0 0 0 1 0 1 1 0 0 0 0 1 1 0 1 1 0<br />

Figure 40. Command and Response Mode example command<br />

t DISC_Ramp_RSP + t DISC_Idle_RSP<br />

PA<br />

[3]<br />

PA CMD<br />

[0] [3]<br />

CMD<br />

[0]<br />

ED<br />

[7]<br />

ED<br />

[0]<br />

RD<br />

[7]<br />

RD CRC<br />

[0] [7]<br />

CRC<br />

[0]<br />

PA[3:0]<br />

CMD[3:0]<br />

ED[7:0]<br />

RD[7:0]<br />

CRC[7:0]<br />

Sensors<br />

62 <strong>Freescale</strong> <strong>Semiconductor</strong>, Inc.

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