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Data Sheet - Freescale Semiconductor

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3.5.4.1 Decimation Sinc filter<br />

The serial data stream produced by the ΣΔ converter is decimated and converted to parallel values by a 3rd order sinc filter with<br />

a decimation factor of 16.<br />

Hz ( )<br />

1 z<br />

Eqn. 4<br />

16 – –<br />

16 1 z 1 –<br />

---------------------------------<br />

× ( – )<br />

3<br />

=<br />

Figure 16. Sinc-filter response<br />

3.5.4.2 Digital gain<br />

The DSP applies a selectable one or two times digital gain to the output of the sinc filter. The gain applied is dependent on the<br />

output range of the device.<br />

3.5.4.3 Low-pass filter<br />

<strong>Data</strong> from the Sinc filter is processed by an infinite impulse response (IIR) low-pass filter.<br />

Hz ( )<br />

n<br />

11<br />

z<br />

a<br />

0<br />

0 ( ⋅ ) n<br />

12<br />

z 1 – ( ⋅ ) n<br />

13<br />

z 2 –<br />

+ + ( ⋅ )<br />

d<br />

11<br />

z0 ( ⋅ ) d<br />

12<br />

z 1 – ( ⋅ ) d<br />

13<br />

z 2 –<br />

n<br />

21<br />

z<br />

--------------------------------------------------------------------------------------------<br />

+ + ( ⋅ )<br />

0 ( ⋅ ) n<br />

22<br />

z 1 – ( ⋅ ) n<br />

23<br />

z 2 –<br />

+ + ( ⋅ )<br />

d<br />

21<br />

z0 ( ⋅ ) d<br />

22<br />

z 1 – ( ⋅ ) d<br />

23<br />

z 2 –<br />

=<br />

⋅ ⋅ --------------------------------------------------------------------------------------------<br />

+ + ( ⋅ )<br />

Eqn. 5<br />

The device provides the option for one of six low-pass filters. The filter is selected with the LPF[3:0] bits in the ACC_CFG register.<br />

The filter selection options are listed in Section 3.1.25.1. Response parameters for the low-pass filter are specified in Section 2.7.<br />

Filter characteristics are illustrated in the following figures.<br />

MMA27XXW<br />

Sensors<br />

<strong>Freescale</strong> <strong>Semiconductor</strong>, Inc. 41

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