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Microcomputer Circuits and Processes

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(b)<br />

D<br />

II<br />

CPU<br />

_____ ~----- w;'es althe bus<br />

Figure 2.1(b)<br />

Interconnecting computer devices: the efficient bus connection.<br />

It saves a lot of wires, but there isjust one problem. What happens if<br />

two devices put their signals onto the bus simultaneously? This is<br />

shown in figure 2.2, where just one wire of the bus is shown, <strong>and</strong> two<br />

logic inverters are shown connected. The output of one is high <strong>and</strong> the<br />

output of the second is low. What happens?<br />

The bus wire cannot<br />

be both low <strong>and</strong> high<br />

Figure 2.2<br />

There is a problem when two devices put different signal levels on to the bus. This<br />

situation must be avoided.<br />

Almost certainly, something will get very hot <strong>and</strong> be damaged; at<br />

the very least the system will not work. This is called bus contention, <strong>and</strong><br />

steps must be taken to ensure that no two devices put their signals on<br />

the bus together. In technical jargon, no two devices may 'talk' to the<br />

bus simultaneously. This is achieved using a type oflogic gate called the<br />

'Tri-State' gate (which is a trademark of National Semiconductor<br />

Corporation). A tristate gate does not have three different logic states,<br />

but is like a normal logic gate in se'rieswith a switch. Look at figure 2.3<br />

which shows a tristate inverter gate. The idea is that a control signal is<br />

able to connect the gate to its output. This is called 'enabling' the gate. If<br />

the enable is low, then there is no output from the gate, neither high nor<br />

low. The gate is in a 'high-impedance' state, meaning that anything<br />

connected to its output does not know it is there. When the gate is<br />

9

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