Microcomputer Circuits and Processes

That is the end of the program, except for the STOP cycles. This
instruction, which has code 0000 lives at memory address 0110. A
glance at the program counter in figure 3.25 should convince you that
the program counter holds this address.
As described in Chapter 2, computer engineers work extensively with
timing diagrams, showing data transfers and control signal changes all
on one diagram. To draw a complete timing diagram for the program
we have just run through would take a very long piece of paper, but
figure 3.26 shows the first three machine cycles for this program. The
FETCH and EXECUTE cycles for the first instruction MVI A are
drawn, and then the FETCH cycle for the second instruction
MOV M~Acc is drawn. This diagram corresponds to figures 3.12 to
3.17, plus a second FETCH cycle.
You see how the bus first transfers an address to memory, the
contents. of the program counter, which is 0000. Note how the ALE
signal goes high to latch this number into the address latch. Then,
during the second period the bus is floated - there is nothing on it. This
is when the program counter is being incremented. In the third clock
period, there is data on the bus, and since the read (RD) line is high, the
CPU is reading this data from memory. This data is of course the
instruction which is being fetched, 0010, which is an MVI A instruction.
FETCH cycle # 1 EXECUTE cycle # 1 FETCH cycle # 2
clock
bus
RD --IIlL.. ----JIlL- IlL- _
WR ----------------------------------
ALE -rlL..- --