Microcomputer Circuits and Processes

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A CONTROL AND DATA AQUISITION COMPUTER Most of the ideas of this chapter can be put to use in building up CONDAC. CONDAC's purpose is Control and Data Aquisition. Before we see how CONDAC could be used in the laboratory, let's look at its circuitry. Don't be put off if it looks complicated, it's not; it's simply a combination of some of the circuits you have just studied. Here is a description of CONDAC, shown in figure 4.38. To the bottom left of the CPU are the memory boards, and to the bottom right is the keyboard with its sixteen keys. Next to this is the display. This is an eight-digit, seven-segment display. At the top right of the circuit diagram, there are two D-to-A converters, labelled x and y. To the right of these is the A-to-D converter, a successive approximation type. Finally, in the bottom right of the circuit there is an input buffer which can read the states of eight logical inputs, and also an output latch which can output eight logical signals. Now for a closer look at some features of the circuit. Firstly, the decoding. In Chapter 2 you learned how different memory boards were selected using a decoder. In the last section of the same chapter, you saw how input and output devices can be selected by using a decoder. CONDAC has two decoders, one reserved for memory, and the other for input-output. The decoders both have 'enable' connections; if enable is low, the decoders' outputs are all low. If enable is high, then the correct output of the decoder will go high. Notice that the MilO signal is used to enable the memory decoder, and the inverse of this signal is used to enable the input-output decoder. So either memory or input-output decoder is selected at any time. It turns out that this use of two decoders saves a handful of gates elsewhere in the circuit. Two outputs from the memory decoder are used. One selects a RAM board, which also receives both RD and WR signals, and the other output selects the ROM board, which, being read only, needs only the RD signal to work. The ROM in CONDAC contains the operating system. This is a chunk of program which actually gets the machine running; scanning the keyboard, allowing you to enter and run programs. It also looks after the multiplexing of the display, allowing you to read results, check memory contents, and the like. In addition, it makes the cassette interface function, and may even contain subroutines to make the D-to-A and A-to-D converters function. (On larger machines, the operating system would run disk drives, and enable you to edit programs shown on a television screen.) Next, take a look at the D-to-A ports. These are selected by outputs 1 and 2 of the input-output decoder. The x-channel is selected by 1,and the y-channel by 2. Since these channels are OUTputting data, they are controlled by the WR signal, which is ANDed with the decoder outputs using the two AND gates shown. The A-to-D converter is selected by decoder output number 7. Two commands must be sent to the A-to-D converter. First, a 'start conversion', which is an OUTput command. The signal is thus generated by ANDing decoder output number 7 with WR. When the conversion is done, the A-to-D converter must inform the CPU of this fact. 70
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General editor. Revised Nuffield Ad
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Longman Group Limited Longman House
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PROLOGUE This Reader explains how m
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transistor, through the logic circu
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tasks (large computing 'power'), wa
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800000 mark. Such high sales result
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CHAPTER 2 THE ELECTRONICS MICROCOMP
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enabled, as the truth table in figu
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D memory cell storing binary 0 stor
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address bus r----- AND gates RD .--
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If you get the chance, look up 7415
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Period 2 Period 3 The data bits are
Page 26 and 27: transfers the full 16 bits of addre
Page 28 and 29: INPUT AND OUTPUT Devices that input
Page 30 and 31: A glance at the timing diagram in f
Page 32 and 33: CHAPTER 3 RUNNING A SIMPLE PROGRAM
Page 34 and 35: adding is represented by 1111. Figu
Page 36 and 37: The number moved into register A im
Page 38 and 39: loaded into register A. So the CPU
Page 40 and 41: The FETCH cycles FETCH cycles, whic
Page 42 and 43: The EXECUTE cycles During EXECUTE c
Page 44 and 45: Second EXECUTE cycle MOV M--+Acc, c
Page 46 and 47: Third EXECUTE cycle ADI, clock peri
Page 48 and 49: That is the end of the program, exc
Page 50 and 51: CHAPTER 4 MEMORIES, INTERFACES, AND
Page 52 and 53: measurements made from a microproce
Page 54 and 55: (al (bl Figure 4.6 (a) Same as in f
Page 56 and 57: A typical bubble unit contains 300
Page 58 and 59: (al driver displays 0 1 1 0 1 0 0 1
Page 60 and 61: Where exactly is this common line c
Page 62 and 63: this R is in series with the next h
Page 64 and 65: That is the principle of the conver
Page 66 and 67: comparator digital-to-analogue data
Page 68 and 69: II CI l! ~L--~---- desired measurem
Page 70 and 71: except that it is sent out bit afte
Page 72 and 73: These equally spaced voltages are f
Page 74 and 75: Figure 4.35 shows how the letter 'D
Page 78 and 79: It does this by outputting a signal
Page 80 and 81: The second application, shown in fi
Page 82 and 83: INDEX This Index will direct you to
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Microcomputer Circuits and Processes

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