Microcomputer Circuits and Processes

a
b
The second FETCH cycle runs just like the first. Note the new value
of the address on the bus (0010) since the program counter was
incremented during the EXECUTE cycle.
You should be able to see already a nice, organized pattern of data
or address transfer and control signal variation. If you are feeling brave,
why not complete a timing diagram for the entire program? If you do
decide to have a go at completing the timing diagram, the following
hints will be useful:
Keep the ALE pulses appearing at regular intervals. Also keep RD (or
WR) pulses appearing at regular intervals.
During EXECUTE cycles 2 and 5, there is no increment in the program
counter. Program counter increments are performed during clock
period 2 of both FETCH and EXECUTE cycles, so EXECUTE cycles 2
and 5 must look like any other EXECUTE cycle, except that clock
period 2 is a 'dummy', and the actual executing takes place, as usual,
during the third clock period.
I hope you have got an impression of a lot of organized timings and
efficiency behind this simple program. An integrated-circuit microprocessor
system is certainly integrated in more ways than one! Just how
real is SAM? Quite real: it is possible to build a machine that will work
just as described. The CPU 'architecture', how many registers, and how
they are connected on the CPU chip, is probably underdeveloped in
SAM; a typical 8-bit CPU chip will have seven or eight 16-bit registers,
and a 16-bit CPU has to have a very sophisticated architecture. In their
instruction sets, these processors may have tens of instructions dedicated
to moving data between registers. And of course we have not
talked about input-output. Different manufacturers have various
philosophies of CPU architecture, but the notions we have been
discussing, such as RD, WR, ALE, and the work in this chapter are
common to most.
The CPU has executed
a STOP
Working through these diagrams of data shunting to and fro along a
bus, you may have noticed a similarity to a certain type of puzzle. Have
a go at one: the two black cars (figure 3.27) want to go to the right and
the three white cars want to go left. There is a passing place big enough
for just one car. What should the cars do? Yes, cars do have reverse
gears don't they?
,---
____
I
.--- .---
~~~
Figure 3.27
Five cars on a data bus. Work out how they must move on the bus and into the 'parking'
register, so they may pass in the directions shown.
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