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Microcomputer Circuits and Processes

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comparator<br />

digital-to-analogue<br />

data<br />

bus<br />

binary counter<br />

stop/continue<br />

o 1<br />

enable<br />

J1.f"UL<br />

clock<br />

start<br />

conversion<br />

Figure 4.25<br />

Components of a linear ramp converter. A D-to-A converter is driven by the binary<br />

counter. The voltage produced, which is a staircase waveform, is compared with the<br />

input voltage. When the two are equal, the counter stops, <strong>and</strong> then holds the binary<br />

value of the input voltage.<br />

number to a voltage which is compared with Jlin. Assume the counter<br />

has reached 0011. The comparator receives voltage 0011 from the D-to-A<br />

converter, <strong>and</strong> compares it with Jlin' 0101. It sees that the D-to-A<br />

converter's voltage is too low, <strong>and</strong> so outputs a logical high. This is fed<br />

back to the counter, which comm<strong>and</strong>s it to continue counting. It<br />

continues from 0011 to 0100,to 0101. At this point the comparator<br />

receives Jlin' 0101, <strong>and</strong> also 0101 from the D-to-A converter. The inputs<br />

are equal, <strong>and</strong> the comparator's output goes logical low (it has been<br />

v+=t>-<br />

V_ -<br />

inputs<br />

output<br />

II<br />

m<br />

~ o><br />

'S 5 V<br />

Do<br />

'S<br />

o<br />

•••••---<br />

logical high<br />

o L..-.__ ••••••L-. _<br />

Input voltages<br />

V+ < V_ I V+ > V_ I<br />

Figure 4.26<br />

Action of a comparator chip. The graph shows the output is 5 V (logical high) when the<br />

voltage V+ is greater than V_. When V+ is less than V_, the output is OV (logical low).<br />

60

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