User Manual - Terasic

8.4 SOPC DemoThis demostration illustrates how to use the SOPC Builder to create a system with the followingfunctions:• Control accelerometer through 3-wire SPI interface• Control analog to digital conversion through 4-wire SPI interface• Access EEPROM memory through I2C interface• Access EPCS memory• System Block DiagramThis section describes the SOPC System Block Diagram of this demo, as shown in Figure 8-6.Figure 8-6 SOPC Block DiagramA 50 MHz Clock is required for the SOPC System. A NIOS II processor is included in the systemfor flow control. The PLL is used to generate clocks, including 100 MHz, 10 MHz and 2MHz. TheNIOS II Processor and SDRAM are running at 100 MHZ. The SDRAM is used to store the NIOS IIProgram. The ADC SPI Controller is running at 2 MHz. The other peripheral controllers are runningat 10 MHz. The ADC SPI Controller and the Accelerometer SPI Controller are custom SOPCcomponent. The source code, for these two controllers, is located in the “ip” folder under thisQuartus II project. The other components are standard SOPC Builder components.135