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MEMORY DATABOOK - Al Kossow's Bitsavers

MEMORY DATABOOK - Al Kossow's Bitsavers

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OKI semiconductorMSM41464RS65,536-WORD x 4-BITS DYNAMIC RANDOM ACCESS <strong>MEMORY</strong>GENERAL DESCRIPTIONThe Oki MSM41464 is a fully decoded, dynamic NMOS random access memory organized as65,536 words by 4 bits. The design is optimized for high-speed, high performance applications suchas mainframe memory, buffer memory, peripheral storage and environments where low power dissipationand compact layout is required.Multiplexed row and column address inputs permit the MSM41464 to be housed in a standard 18pin DIP. Pin-outs conform to the JEDEC approved pin out. Additionally, the MSM41464 offers newfunctional enhancements that make it more versatile than previous dynamic RAMs. "CASbefore-RAS"refresh provides an on-chip refresh capability.The MSM41464 is fabricated using silicon gate NMOS and Oki's advanced VLSI Polysiliconprocess. This process, coupled with single-transistor memory storage cells, permits maximum circuitdensity and minimum chip size. Dynamic circuitry is employed in the design, including the senseamplifiers.Clock timing requirements are noncritical, and power supply tolerance is very wide. <strong>Al</strong>l inputs andoutput are TTL compatible.FEATURES• 65,536 x 4 RAM, 18 pin package• Silicon-gate, Double Poly NMOS, singletransistor cell• Row access time:100 ns max (MSM41464-1 DRS)120 ns max (MSM41464-12RS)150 ns max (MSM41464-15RS)• Cycle time:200 ns min (MSM41464-1 DRS)230 ns min (MSM41464-12RS)260 ns min (MSM41464-15RS)• Low power:385 mW active, 28 mW max standby• Single +5V Supply, ± 10% tolerance• <strong>Al</strong>l inputs TTL compatible, low capacitive load• Three-state TTL compatible output• "Gated" CAS• 256 refresh cycles/4 ms• Output impedance controllable through earlywrite and OE operations• Output unlatched at cycle end allowsextended page boundary andtwo-dimensional chip select• Read-Modify-Write, RAS-only refresh,capability• On-chip latches for Addresses and Data-in• On-chip substrate bias generator for highperformance• CAS-before-RAS refresh capability• "Page Mode" capabilityPIN CONFIGURATION (TOP VIEW)OEDQ1DO,VSSDO,CASPin NamesAo-A,RASFUnctionAddress InputsRow Address StrobeWE D03 CAS Column Address StrobeRAS Ao DO,-DO, Data In/Data OutA, OE Output EnableA5 A,-WE Write EnableA, A3VCC Power Supply (+5V)VCC A-VSSGround (DV)163

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