MEMORY DATABOOK - Al Kossow's Bitsavers

OKI semiconductorMSM411 001 RS1048576-BIT DYNAMIC RANDOM ACCESS MEMORY < Nibble Mode Type>GENERAL DESCRIPTIONThe Oki MSM411 001 is a fully decoded, dynamic NMOS random access memory organized as 1 048576 one-bit words.The design is optimized for high-speed, high performance applications such as mainframe memory, buffer memory,peripheral storage and environments where low power dissipation and compact layout is required.Multiplexed row and column address inputs permit the MSM411 001 to be housed in a standard 18 pin DIP. Pin-outsconform to the JEDEC approved pin out. Additionally, the MSM411001 offers new functional enhancements thatmake it more versatile than previous dynamic RAMs. "CAS-before-RAS" refresh provides an on-chip refresh capability,also features "nibble mode" which allows high speed serial access to up to 4 bits of data.The MSM411001 is fabricated using sil icon gate NMOS and Oki's advanced VLSI Polysilicon process. This process,coupled with single-transistor memory storage cells, permits maximum circuit density and minimal chip size. Dynamiccircuitry is employed in the design, including the sense amplifiers.Clock timing requirements are noncritical, and power supply tolerance is very wide. All inputs and output are TTLcompatible.FEATURES.1048576 x 1 RAM, 18 pin package• Silicon-gate, Tripple Poly NMOS, single transistor cell• Row access time100 ns max (MSM411001-10RS)120 nsmax (MSM411001-12RS)• Cycle time200 ns min (MSM411001-10RS)230 ns min (MSM411001-12RS)• Low power: 411001-12RS413 mW/28 mW (MSM411001-10RS)385 mW/28 mW (MSM411001-12RS)• Single+5V Supply, ±10% tolerance• All inputs TTL compatible, low capacitive load• Three-state TTL compatible output• Gated CAS• 8ms/512 refresh cycles• Common I/O capability using "Early Write"operation• Output unlatched at cycle end allows extended pageboundary and two-dimensional chip select• Read-Modify-Write, RAS-only refresh, capability• On-