MEMORY DATABOOK - Al Kossow's Bitsavers

.---=D=-._K __ I __s_._rn-'----l_c_onc:I __ U_c_.or ______ ~_~MSM414256RS262,144·WORD x 4·BITS DYNAMIC RAMGENERAL DESCRIPTIONThe MSM414256RS is a new generation dynamic RAM organized as 262,144 words by 4 bits.The technology used to fabricate the MSM414256RS is OKI's N channel silicon gate MOS processtechnology. The device operates at a single +5V power supply. Its I/O pins are TTL compatible.FEATURES• Silicon gate, tripple polysilicon NMOS,1-transistor memory cell• 262,144 words by 4 bits• Standard 20-pin plastic DIP• Family organizationFamilyMSM414256-10RSMSM414256-1 2RSAccess Time(MAX)100 ns120 nsCycle TimePower Dissipation(MIN) Operating Stand By(MAX)(MAX)200 ns 413mW230 ns 385mW28mW• Single +5V supply, ± 10% tolerance• Input: TTL compatible, address input, datainput latch• Output: TTL compatible, tristate, non latch• Refresh: 512 cycles/8 ms• Output impedance controllable through earlywrite and OE operations• Page mode, read modify write capability• CAS before RAS refresh, CAS before RAShidden refresh, RAS only refresh capability• "Gated"CAS• Built-in VBB generator circuitPIN CONFIGURATION (TOP VIEW)~D03D04WE DOl Pin Names FunctionCASAOtoA8 Address InputNCOERASRow Address Strobec;;;gColumn Address Strobe"AOAS"001 to 004 Data In/Data Out"Al A7" DE Output Enable"A2 WE Write Enable"A3VCCPower Supply (+5V)VSSGround (OV)"Refresh Address178