MEMORY DATABOOK - Al Kossow's Bitsavers

.STATICRAM·MSM51257LRS/JS •• ----------------READ CYCLE~-----------tRC----------~1/0 -------......::::.:..:....-K-~Notal:1. A Read occurs during the overlap of a low CS, a low OE and ahigh WE.2. tcx is specified from CS or OE, whichever occurs last.3. tOTO is specified from CS or OE, whichever occurs first.4. tOHA and tOTO are specified by the time when DATA OUT is floating.WRITE CYCLE(Vee = 5V ± 10%, Ta = O°C to +70 0 C)MSM51257L·85 MSM51257L·10 MSM51257L·12Item Symbol UnitMin. Max. Min. Max. Min. Max.Write Cycle Time twc 85 100 120 nsAddress to Write Setup Time tAS 0 0 0 nsWrite Time tw 65 75 90 nsWrite Recovery Time twR 5 10 10 nsData Setup Time tos 35 40 50 nsData Hold from Write Time tOH 0 0 0 nsOutput 3·State from Write tOTW 0 30 0 35 0 40 nsChip Selection to End of Write tcw 75 90 100 nsAddress Valid to End of Write tAW 75 90 100 nsOutput Active from End of Write twx 5 5 15 nsNotes:1. A Write Cycle occurs during the overlap of a low CS, and a low WE.2. OE may be both high and low in a Write Cycle.3. tAS is specified from CS or WE, whichever occurs last.4. tw is anoverlap time of a low CS, and a low WE.5. tWR, tos and tOH are specified from CS or WE, whichever occurs first.6. tOTW is specified by the time when DATA OUT is floating, not defined by output leve\.7. When 110 pins are Data output mode, don't force inverse signal to those pins.322