MEMORY DATABOOK - Al Kossow's Bitsavers

• STATIC RAM· MSM5165LRS/JS •• -----------------READ CYCLE~-----------tRC----------~I/O --------=..:..:.....*«Notes:1. A Read occurs during the overlap of a low CE l' a high CE" a low OE and a high WE.2. tcx is specified from CE l' CE, or OE, whichever occurs last.3. tOTD is specified from CE I' CE, or OE, whichever occurs first.4. tOHA and tOTD are specified by the time when DATA OUT is floating.WRITE CYCLE(Vcc = 5V ± 10%, Ta = O°C to +70°C)MSM5165L-12 MSM5165L-15 MSM5165L-20ItemSymbolMin. Max. Min. Max. Min. Max.Write Cycle Time !WC 120 150 200Address to Write Setup Time tAS 0 0 0Write Time tw 70 90 120Write Recovery Time tWR 15 15 15Data Setup Time tDS 50 60 80Data Hold from Write Time tDH 0 0 0Output 3-State from Write tOTW 0 40 0 50 0 60Chip Selection to End of Write tcw 100 120 150Address Val id to End of Write tAW 100 120 150Output Active from End of Write twx 5 5 5UnitnsnsnsnsnsnsnsnsnsnsNotes: 1. A Write Cycle occurs during the overlap of a low CE I , a high CE, and a low WE.2. OE may be both high and low in a Write Cycle.3. tAS is specified from CE I' CE, or WE, whichever occurs last.4. tw is an overlap time of a low CE I , a high CE, and a low WE.5. tWR, tDS and tDH are specified from CE I , CE, or WE, whichever occurs first.6.7.tOTW is specified by the time when DATA OUT is floating, not defined by output level.When I/O pins are Data output mode, don't force inverse signal to those pins.304