PCT/2001/50 - World Intellectual Property Organization

50/2001
23098 PCT Gazette - Section I - Gazette du PCT 13 Dec/déc 2001
(72, 75) DELEONIBUS, Simon [FR/FR]; 40,
allée des Giteaux, La Chanteraie, F-38640
Claix (FR).
(74) WEBER, Etienne; Brevatome, 3, rue du
Docteur Lancereaux, F-75008 Paris (FR).
(81) JP US.
(84) EP (AT BE CH CY DE DK ES FI FR GB GR
IE IT LU MC NL PT SE TR).
(51) 7 H01L 21/336, 21/768
(11) WO 01/95384 (13) A1
(21) PCT/GB01/02456
(22) 4 Jun/juin 2001 (04.06.2001)
(25) en (26) en
(30) 0013473.4 3 Jun/juin 2000 GB
(03.06.2000)
(43) 13 Dec/déc 2001 (13.12.2001)
(54) • A METHOD OF ELECTRONIC COM-
PONENT FABRICATION AND AN
ELECTRONIC COMPONENT
• PROCEDE DE FABRICATION DE
COMPOSANT ELECTRONIQUE ET
COMPOSANT ELECTRONIQUE
(71) THE UNIVERSITY OF LIVERPOOL
[GB/GB]; Senate House, Abercromby
Square, Liverpool L69 3BX (GB).
(for all designated States except / pour tous
les États désignés sauf US)
(72, 75) ECCLESTON, William [GB/GB]; 8
College Avenue, Formby, Merseyside L37
3JL (GB).
(74) W.P. THOMPSON & CO.; Coopers Building,
Church Street, Liverpool L1 3AB (GB).
(81) AE AG AL AM AT AU AZ BA BB BG BR
BY BZ CA CH CN CO CR CU CZ DE DK
DM DZ EC EE ES FI GB GD GE GH GM
HR HU ID IL IN IS JP KE KG KP KR KZ
LC LK LR LS LT LU LV MA MD MG MK
MN MW MX MZ NO NZ PL PT RO RU SD
SE SG SI SK SL TJ TM TR TT TZ UA UG
US UZ VN YU ZA ZW.
(84) AP (GH GM KE LS MW MZ SD SL SZ TZ
UG ZW); EA (AM AZ BY KG KZ MD RU
TJ TM); EP (AT BE CH CY DE DK ES FI
FR GB GR IE IT LU MC NL PT SE TR); OA
(BF BJ CF CG CI CM GA GN GW ML MR
NE SN TD TG).
Published / Publiée :(c)
(51) 7 H01L 21/336, 21/66, 21/225, 29/78, 29/06
(11) WO 01/95385
(21) PCT/US01/18007
(13) A1
(22) 1 Jun/juin 2001 (01.06.2001)
(25) en (26) en
(30) 09/586,407 2 Jun/juin 2000
(02.06.2000)
US
(30) 09/766,229 19 Jan/jan 2001
(19.01.2001)
US
(43) 13 Dec/déc 2001 (13.12.2001)
(54) • METHOD OF MAKING A POWER
MOSFET
• PROCEDE DE FABRICATION D’UN
MOSFET DE PUISSANCE
(71) GENERAL SEMICONDUCTOR, INC.
[US/US]; 10 Melville Park Road, Melville,
NY 11747 (US).
(72) BLANCHARD, Richard, A.; 10724 Mora
Drive, Los Altos, CA 94024 (US).
(74) MAYER, Stuart, H.; Mayer, Fortkort &
Williams, Suite 250, 200 Executive Drive,
West Orange, NJ 07052 (US).
(81) AE AG AL AM AT AU AZ BA BB BG BR
BY BZ CA CH CN CO CR CU CZ DE DK
DM DZ EE ES FI GB GD GE GH GM HR
HU ID IL IN IS JP KE KG KP KR KZ LC
LK LR LS LT LU LV MA MD MG MK MN
MW MX MZ NO NZ PL PT RO RU SD SE
SG SI SK SL TJ TM TR TT TZ UA UG UZ
VN YU ZA ZW.
(84) AP (GH GM KE LS MW MZ SD SL SZ TZ
UG ZW); EA (AM AZ BY KG KZ MD RU
TJ TM); EP (AT BE CH CY DE DK ES FI
FR GB GR IE IT LU MC NL PT SE TR); OA
(BF BJ CF CG CI CM GA GN GW ML MR
NE SN TD TG).
Published / Publiée :(c)
(51) 7 H01L 21/60
(11) WO 01/95386
(21) PCT/US01/13760
(13) A2
(22) 26 Apr/avr 2001 (26.04.2001)
(25) en (26) en
(30) 2000-171885 8 Jun/juin 2000
(08.06.2000)
JP
(43) 13 Dec/déc 2001 (13.12.2001)
(54) • APPARATUS AND METHOD FOR
CORRECTING WARP OF SEMICON-
DUCTOR CARRIER TAPE
• APPAREIL
CORRIGER
ET
LE
PROCEDE POUR
GAUCHISSEMENT
DE BANDES DE SUPPORT DE
SEMI-CONDUCTEURS
(71) 3M INNOVATIVE PROPERTIES COM-
PANY [US/US]; P.O. Box 33427, 3M Center,
Saint Paul, MN 55133-3427 (US).
(72) KAWAI, Takayuki; P.O. Box 33427, Saint
Paul, MN 55133-3427 (US). OHKURA,
Yoshiyuki; P.O. Box 33427, Saint Paul, MN
55133-3427 (US).
(74) McNUTT, Matthew, B. et al. / etc.; Office
of Intellectual Property Counsel, P.O. Box
33427, Saint Paul, MN 55133-3427 (US).
(81) KR SG.
(51) 7 H01L 21/60
(11) WO 01/95387
(21) PCT/US01/14761
(13) A2
(22) 8 May/mai 2001 (08.05.2001)
(25) en (26) en
(30) 2000-171889 8 Jun/juin 2000
(08.06.2000)
JP
(43) 13 Dec/déc 2001 (13.12.2001)
(54) • PACKAGING TOOLS AND METHOD
FOR SEMICONDUCTOR CARRIER
TAPE
• OUTILS ET PROCEDES DE TRAI-
TEMENT DE RUBAN PORTE-SEMI-
CONDUCTEURS
(71) 3M INNOVATIVE PROPERTIES COM-
PANY [US/US]; Post Office Box 33427, 3M
Center, Saint Paul, MN 55133-3427 (US).
(72) OHKURA, Yoshiyuki; Post Office Box
33427, Saint Paul, MN 55133-3427 (US).
KAWAI, Takayuki; Post Office Box 33427,
Saint Paul, MN 55133-3427 (US).
(74) McNUTT, Matthew, B. et al. / etc.; Office
of Intellectual Property Counsel, Post Office
Box 33427, Saint Paul, MN 55133-3427
(US).
(81) KR SG.
(51) 7 H01L 21/68, 21/66
(11) WO 01/95388
(21) PCT/JP01/04822
(13) A1
(22) 7 Jun/juin 2001 (07.06.2001)
(25) ja (26) ja
(30) 2000-170453 7 Jun/juin 2000
(07.06.2000)
JP
(30) 2000-292837 26 Sep/sep 2000
(26.09.2000)
JP
(43) 13 Dec/déc 2001 (13.12.2001)
(54) • SUPPORTING CONTAINER AND
SEMICONDUCTOR MANUFACTUR-
ING AND INSPECTING DEVICE
• RECIPIENT SUPPORT, FABRICATION
DE SEMI-CONDUCTEURS ET DISPO-
SITIF D’INSPECTION
(71) IBIDEN CO., LTD. [JP/JP]; 1, Kandacho
2-chome, Ogaki-shi, Gifu 503-0917 (JP).
(for all designated States except / pour tous
les États désignés sauf US)
(72, 75) HIRAMATSU, Yasuji [JP/JP]; c/o
IBIDEN CO., LTD., 1-1, Kitagata, Ibigawacho,
Ibi-gun, Gifu 501-0695 (JP). ITO,
Yasutaka [JP/JP]; c/o IBIDEN CO., LTD.,
1-1, Kitagata, Ibigawacho, Ibi-gun, Gifu
501-0695 (JP).
(74) YASUTOMI, Yasuo et al. / etc.; Chuo
BLDG., 4-20, Nishinakajima 5-chome, Yodogawa-ku,
Osaka-shi, Osaka 532-0011 (JP).
(81) US.
(84) EP (AT BE CH CY DE DK ES FI FR GB GR
IE IT LU MC NL PT SE TR).
(51) 7 H01L 21/761
(11) WO 01/95389 (13) A2
(21) PCT/US01/18153
(22) 5 Jun/juin 2001 (05.06.2001)
(25) en (26) en
(30) 09/588,243 6 Jun/juin 2000 US
(06.06.2000)
(43) 13 Dec/déc 2001 (13.12.2001)
(54) • SHIELDING OF ANALOG CIRCUITS
ON SEMICONDUCTOR SUBSTRATES
• BLINDAGE DE CIRCUITS ANALO-
GIQUES SUR DES SUBSTRATS SEMI-
CONDUCTEURS
(71) INFINEON TECHNOLOGIES NORTH
AMERICA CORP. [US/US]; 1730 North
First Street, San Jose, CA 95112-4508 (US).
(72) PRIGGE, Odin; 22 Ervin Drive, Wappingers
Falls, NY 12590 (US).
(74) BRADEN, Stanton, C. et al. / etc.; Siemens
Corporation - Intellectual Property Dept., 186
Wood Ave. South, Iselin, NJ 08830 (US).
(81) JP KR.
(84) EP (AT BE CH CY DE DK ES FI FR GB GR
IE IT LU MC NL PT SE TR).