Burn-in & Test Socket Workshop - BiTS Workshop

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Test System Design:Motorola Inc. / SPS Group35
Motorola Inc. / SPS GroupThe test system consists of:! Two separate chambers containing 14individual slots for accepting DUT boards! HDI connector provides signal path betweenthe DUT board and its respective driverboard located internal to the test platform! All necessary power and drive signals aremade available to the wafer via this interface36
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Burn-in & TestSocket WorkshopIEEEMa
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Technical ProgramSession 8Wednesday
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KGD Sacrificial Metal WLBI• Defin
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Purpose For DevelopingWafer Level B
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Wafer Level Burn-in MethodologyPack
Page 13 and 14: 5 inch Wafer Level Burn-In Methodol
Page 15 and 16: 8 inch WLBI MethodologyPost wafer f
Page 17 and 18: 8 inch Wafer Level Burn-In SystemCu
Page 19 and 20: WLBI Design Considerations● Minim
Page 21 and 22: System Design Considerations● Max
Page 23 and 24: Accomplishments•8 inch Wafer Prog
Page 25 and 26: Accomplishments•Reliability Studi
Page 28 and 29: AcknowledgmentsThe authors would li
Page 30 and 31: For Bits 2001 Workshop on Test & Bu
Page 32: Wafer-Level Test & Burn-InWafer-lev
Page 35 and 36: Became nucleus for such KGD socket/
Page 37 and 38: ! Over 65 different CSP packages fr
Page 39 and 40: MotorolaCurrent Final Manufacturing
Page 41 and 42: MotorolaWLBI Beta Development Syste
Page 43 and 44: MatsushitaMatsushita WLBI System Ov
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Page 58 and 59: Aehr Test SystemsAehr Test Systems
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Page 70 and 71: Contributors1. Flynn, Greg W., “W
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