Burn-in & Test Socket Workshop - BiTS Workshop

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Die Product ConsortiumDie Products Consortium (DPC) - KGD Testand Reliability Screens MethodsDemonstration ProjectThe Die Products Consortium (DPC) is acooperative effort among several leadingmicroelectronics companies to advance thedevelopment of a support infrastructure thatwill accelerate the adoption of die products byelectronic system manufacturers worldwide.Currently, there are seven membersinvolved with the Test MethodsDemonstration Project - these include ChipSupply, IBM, Lucent, Intel, T.I., NationalSemiconductor, and CypressSemiconductor. The Consortium is beingmanaged by MCC, recognized as a globalleader in KGD technology.39
The goal of the Test Methods DemonstrationProject is to demonstrate that wafer level testand stress screening methods are effective forthe acceleration and detection of varioustypes of defects.This project will provide a baseline formembers to compare defectivity of their fabswith other members’ experience on a strictconfidential basis.The Project will develop the tools and provideunderstanding of the industry’s “best practice”,enabling members to determine the most costeffective means to achieve their particularreliability goals.40
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Burn-in & TestSocket WorkshopIEEEMa
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Technical ProgramSession 8Wednesday
Page 6 and 7:
KGD Sacrificial Metal WLBI• Defin
Page 8 and 9:
Purpose For DevelopingWafer Level B
Page 10 and 11:
Wafer Level Burn-in MethodologyPack
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5 inch Wafer Level Burn-In Methodol
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8 inch WLBI MethodologyPost wafer f
Page 17 and 18: 8 inch Wafer Level Burn-In SystemCu
Page 19 and 20: WLBI Design Considerations● Minim
Page 21 and 22: System Design Considerations● Max
Page 23 and 24: Accomplishments•8 inch Wafer Prog
Page 25 and 26: Accomplishments•Reliability Studi
Page 28 and 29: AcknowledgmentsThe authors would li
Page 30 and 31: For Bits 2001 Workshop on Test & Bu
Page 32: Wafer-Level Test & Burn-InWafer-lev
Page 35 and 36: Became nucleus for such KGD socket/
Page 37 and 38: ! Over 65 different CSP packages fr
Page 39 and 40: MotorolaCurrent Final Manufacturing
Page 41 and 42: MotorolaWLBI Beta Development Syste
Page 43 and 44: MatsushitaMatsushita WLBI System Ov
Page 45 and 46: MatsushitaIn conclusion, a first st
Page 47 and 48: FormFactorThe ultimate extension of
Page 49 and 50: FormFactorThe WOW Process: A Wafer
Page 51 and 52: FormFactorWLBI Clamping and Cooling
Page 53 and 54: GryphicsGryphics®, Inc.In Developm
Page 56 and 57: The following is an example ofsuch
Page 58 and 59: Aehr Test SystemsAehr Test Systems
Page 60 and 61: Aehr Test SystemsThe economics and
Page 62 and 63: Motorola Inc. / SPS GroupSacrificia
Page 64 and 65: Test System Design:Motorola Inc. /
Page 66 and 67: Fixture Design and Contact Technolo
Page 70 and 71: Contributors1. Flynn, Greg W., “W
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