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3.8 Pole/Zero Analysis 313<br />

option name<br />

Protocol<br />

default value<br />

Inherited[AnalogInsydes]<br />

standard Analog Insydes protocol<br />

specification (see Section 3.14.5)<br />

Option for RootLocusByQZ.<br />

See also: PolesAndZerosByQZ (Section 3.8.3), RootLocusPlot (Section 3.9.5),<br />

UseExternals (Section 3.14.7).<br />

Examples<br />

Load Analog Insydes.<br />

Read in a PSpice netlist<br />

and small-signal data.<br />

Set up system of symbolic<br />

AC equations.<br />

Get the design-point value<br />

of Cbc$Q$T5.<br />

Calculate root locus of the<br />

circuit as Cbc$Q$T5 is<br />

varied from pF to pF<br />

in steps of pF.<br />

In[1]:= AC, ElementValues −> Symbolic]<br />

Out[3]= DAEAC, 18 18 <br />

In[4]:= Cbc$Q$T5 /. GetDesignPoint[mnabuffersym]<br />

Out[4]= 8.39 10 12<br />

In[5]:= rloc = RootLocusByQZ[mnabuffersym, V$99,<br />

{Cbc$Q$T5, 5.0*^−12, 50.0*^−12, 5.0*^−12}];

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