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Contents Telektronikk - Telenor

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4.1.2 The STG overview<br />

The purpose of the STG is to generate<br />

traffic with properties similar to a multiplex<br />

of independent sources where each<br />

source has a behaviour close to real<br />

source. The software and hardware elements<br />

that constitute the STG sub-system<br />

are shown in Figure 4.2.<br />

The software runs on a SUN SPARC<br />

under SOLARIS 2.3. It includes an Open<br />

Windows based man machine interface<br />

(MMI), several graphical editors, the<br />

STG Module Handler performing the<br />

necessary checking and compilation of<br />

source types and scenarios and the STG<br />

specific drivers. The system also contains<br />

the STG database which includes various<br />

set-ups, scenarios, source-type definitions,<br />

etc.<br />

4.1.3 The STG hardware<br />

The hardware is made as a two slot Csize<br />

VXI module. It consists of 12<br />

FPGAs (field programmable gate arrays),<br />

each in the range 10,000–20,000 gates<br />

and 10 Mbit of RAM. One of the slots<br />

serves as the VME/VXI interface, which<br />

handles the communication with the rest<br />

of the instrument. The other slot is the<br />

STG kernel and handles the composite<br />

source model. The functionality is<br />

arranged as shown in Figure 4.3.<br />

In the block to the left, the next time and<br />

old/new state are found for the next state<br />

change, cf. (3) and (4) of Table 2.1.<br />

These are transferred to the next block,<br />

and the block is ready for the next operation.<br />

The FIND SOURCE block finds the<br />

source for the state change, cf. (5) and<br />

(6), and finds the pattern associated with<br />

the new state. These data are sent down<br />

to the UPDATE PATTERN block together<br />

with the time when the pattern<br />

should be updated. The FIND SOURCE<br />

block also handles the activations/deactivations<br />

sent by the software, and the long<br />

patterns. Long patterns are handled as a<br />

set of normal patterns resulting in a “state<br />

change” for each new part of the long<br />

pattern.<br />

The UPDATE PATTERN block updates<br />

up to 8 state changes in parallel, at the<br />

time requested. The old patterns are<br />

removed from the PCTP (periodic cell<br />

transmission pattern) and the new ones<br />

added, see Figure 2.13.<br />

Every 2.7 microsecond a source_id is<br />

read out from the PCTP and sent to the<br />

ASSEMBLE CELL block. This block<br />

uses the source_id from the PCTP as a<br />

pointer to a cell with header and payload,<br />

Find:<br />

next time<br />

old state<br />

new state<br />

Next time<br />

Old state<br />

New state<br />

Activation<br />

Deactivation<br />

Find:<br />

source<br />

Handle:<br />

Activation<br />

deactivation<br />

Long Pattern<br />

Figure 4.3 The STG hardware block diagram<br />

and sends this cell out to the next module<br />

in the test tool. A cell may be transformed<br />

into a test cell (foreground traffic)<br />

before it ends up in the output module<br />

(OM).<br />

The two blocks to the left in Figure 4.3,<br />

which handle the stochastic parts of the<br />

model, use four Tausworthe pseudo-random<br />

generators with primitive trinomials<br />

between 25 and 34 bit [34, 35]. The<br />

sequence lengths of each random generator<br />

are mutually prime. To ensure no<br />

correlation between the numbers, the<br />

generators are clocked as many time as<br />

their length between each time a number<br />

is used.<br />

The activation and deactivation are used<br />

to emulate the connection level. The software<br />

sends activation and deactivation<br />

messages to the hardware at the time<br />

these should take place according to the<br />

load profiles. There will be one profile<br />

for each pair of source type and destination<br />

in the network, see Table 2.2 for an<br />

example. In a profile the number of<br />

sources for this pair will vary according<br />

to the graph. When the level changes, the<br />

software selects which sources to activate/deactivate.<br />

Since the properties of<br />

all the source of the same type toward the<br />

same destination are identical, an arbitrary<br />

selection of these may be chosen.<br />

The software handles simultaneously all<br />

profiles for all source types toward all<br />

destinations, cf. Figure 2.14. When a profile<br />

changes, the activation/deactivation<br />

which corresponds to the change will be<br />

sent to the hardware. The changes are<br />

effectuated in the hardware as soon as<br />

possible, which is maximum eight activations<br />

or deactivations per 0.1 ms and, on<br />

the average, seven at nominal load.<br />

Next time<br />

Next source<br />

Next pattern ATM-cell<br />

Update<br />

pattern<br />

Assemble<br />

cell<br />

Update Cell pointer<br />

Periodic cell transmission pattern<br />

4.1.4 The STG software<br />

The software is written in C. The volume<br />

of the executable is about 12.5 Mbytes<br />

and on-line help, database, etc. occupy a<br />

similar volume. An outline of the various<br />

software elements is presented in Figure<br />

4.2.<br />

The Scenario editor is in many ways the<br />

core of the STG software. For each<br />

measurement, a scenario is defined. In<br />

this editor the number of sources, source<br />

types, destinations, cell headers/payloads<br />

and load profiles are put together, see<br />

Table 2.2. It also checks the parameters<br />

and calculates values, like average and<br />

maximum load, average rate of state and<br />

pattern changes. Graphs like the expected<br />

load as a function of time and type/destination<br />

are also calculated and presented<br />

to the user, see Figure 2.14.<br />

Load profiles for activation – deactivation,<br />

i.e. handling the connection level,<br />

are defined in the Profile editor as a<br />

graph of how many sources that are<br />

active at any measurement instant. The<br />

graphs are similar to those indicated in<br />

Table 2.2.<br />

The hardware is initialised and controlled<br />

through the STG module handler. When a<br />

measurement shall be carried out it calculates<br />

the necessary parameters to set the<br />

STG in a steady state for the actual load<br />

scenario, transforms the scenario definition<br />

to the format required by the STG<br />

and downloads the data to the hardware.<br />

The Source type editor allows an efficient<br />

definition of state diagrams with a<br />

“bubble” for each state containing name,<br />

sojourn time and a pattern_id, arrows<br />

between the states hold the next state<br />

probabilities, i.e. similar to what is indi-<br />

189

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