Intel® Extended Memory 64 Technology Software Developer's Guide

DEC—Decrement by 1Opcode Instruction 64-Bit Mode Compat/Leg DescriptionModeFE /1 DEC r/m8 Valid Valid Decrement r/m8 by 1REX + FE /1 DEC r/m8* Valid N.E. Decrement r/m8 by 1FF /1 DEC r/m16 Valid Valid Decrement r/m16 by 1FF /1 DEC r/m32 Valid Valid Decrement r/m32 by 1REX.W + FF /1 DEC r/m64 Valid N.E. Decrement r/m64 by 148+rw DEC r16 N.E. Valid Decrement r16 by 148+rd DEC r32 N.E. Valid Decrement r32 by 1* In 64-bit mode, r/m8 can not be encoded to access the following byte registers if an REX prefix is used: AH, BH, CH, DH. Alsorefer to Section 1.4.2.2.Flags AffectedThe CF flag is not affected. The OF, SF, ZF, AF, and PF flags are set according to the result.IA-32e Mode OperationInstruction is promoted to 64-bits.Default Operation Size is 32-bits.Opcode 48H through 4FH are REX prefixes in 64-bit mode.Enables access to new registers R8-R15.Protected Mode Exceptions#GP(0)#SS(0)#PF(fault-code)#AC(0)If the destination operand is located in a nonwritable segment.If a memory operand effective address is outside the CS, DS, ES, FS, or GS segment limit.If the DS, ES, FS, or GS register contains a null segment selector.If a memory operand effective address is outside the SS segment limit.If a page fault occurs.If alignment checking is enabled and an unaligned memory reference is made while thecurrent privilege level is 3.Real-Address Mode Exceptions#GP#SSIf a memory operand effective address is outside the CS, DS, ES, FS, or GS segment limit.If a memory operand effective address is outside the SS segment limit.Virtual-8086 Mode Exceptions#GP(0)#SS(0)#PF(fault-code)#AC(0)If a memory operand effective address is outside the CS, DS, ES, FS, or GS segment limit.If a memory operand effective address is outside the SS segment limit.If a page fault occurs.If alignment checking is enabled and an unaligned memory reference is made.Compatibility Mode ExceptionsSame as protected mode exceptions.2-146 Vol. 1