Intel® Extended Memory 64 Technology Software Developer's Guide

FISTTP—Store Integer with TruncationOpcode Instruction 64-Bit Mode Compat/Leg DescriptionModeDF /1 FISTTP m16int Valid Valid Store ST(0) in m16int with truncationDB /1 FISTTP m32int Valid Valid Store ST(0) in m32int with truncationDD /1 FISTTP m64int Valid Valid Store ST(0) in m64int with truncationIA-32e Mode OperationSame as legacy mode.FPU Flags AffectedC1 Cleared to 0.C0, C2, C3 Undefined.Floating-Point Exceptions#ISStack underflow occurred.#IASource operand is too large for the destination formatSource operand is a NaN value or unsupported format.#P Value cannot be represented exactly in destination format.Protected Mode Exceptions#GP(0)If the destination is located in a nonwritable segment.For an illegal memory operand effective address in the CS, DS, ES, FS, or GS segment.#SS(0)For an illegal address in the SS segment.#NMEM or TS in CR0 is set.#MFIf there is a pending x87 FPU exception.#PF(fault-code) If a page fault occurs.#AC(0)If alignment checking is enabled and an unaligned memory reference is made while thecurrent privilege level is 3.#UD If CPUID feature flag SSE3 is 0.Real-Address Mode Exceptions#GP#SS#NM#MFIf a memory operand effective address is outside the CS, DS, ES, FS, or GS segment limit.If a memory operand effective address is outside the SS segment limit.EM or TS in CR0 is set.If there is a pending x87 FPU exception.Vol. 1 2-189