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Intel® Extended Memory 64 Technology Software Developer's Guide

Intel® Extended Memory 64 Technology Software Developer's Guide

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LMSW—Load Machine Status WordOpcode Instruction <strong>64</strong>-Bit Mode Compat/Leg DescriptionMode0F 01 /6 LMSW r/m16 Valid Valid Loads r/m16 in machine status word of CR0Flags AffectedNone.IA-32e Mode OperationSame as legacy mode.Operand size fixed at 16 bits.Protected Mode Exceptions#GP(0) If the current privilege level is not 0.If a memory operand effective address is outside the CS, DS, ES, FS, or GS segment limit.If the DS, ES, FS, or GS register is used to access memory and it contains a null segmentselector.#SS(0)#PF(fault-code)If a memory operand effective address is outside the SS segment limit.If a page fault occurs.Real-Address Mode Exceptions#GPIf a memory operand effective address is outside the CS, DS, ES, FS, or GS segment limit.Virtual-8086 Mode Exceptions#GP(0) If the current privilege level is not 0.If a memory operand effective address is outside the CS, DS, ES, FS, or GS segment limit.#SS(0)#PF(fault-code)If a memory operand effective address is outside the SS segment limit.If a page fault occurs.Compatibility Mode ExceptionsSame as for protected mode exceptions.<strong>64</strong>-Bit Mode Exceptions#SS(0)If a memory address referencing the SS segment is in a non-canonical form.#GP(0) If the current privilege level is not 0.If the memory address is in a non-canonical form.#PF(fault-code) If a page fault occurs.Vol. 1 2-293

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