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Intel® Extended Memory 64 Technology Software Developer's Guide

Intel® Extended Memory 64 Technology Software Developer's Guide

Intel® Extended Memory 64 Technology Software Developer's Guide

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LEAVE—High Level Procedure ExitOpcode Instruction <strong>64</strong>-Bit Mode Compat/Leg DescriptionModeC9 LEAVE Valid Valid Set SP to BP, then pop BPC9 LEAVE Valid Valid Set ESP to EBP, then pop EBPC9 LEAVE Valid N.E. Set RSP to RBP, then pop RBPFlags AffectedNone.IA-32e Mode OperationDefault Operation Size is <strong>64</strong> bitsIn <strong>64</strong>-bit mode a 32-bit operationProtected Mode Exceptions#SS(0)#PF(fault-code)#AC(0)If the EBP register points to a location that is not within the limits of the current stacksegment.If a page fault occurs.If alignment checking is enabled and an unaligned memory reference is made while thecurrent privilege level is 3.Real-Address Mode Exceptions#GPIf the EBP register points to a location outside of the effective address space from 0 toFFFFH.Virtual-8086 Mode Exceptions#GP(0)#PF(fault-code)#AC(0)If the EBP register points to a location outside of the effective address space from 0 toFFFFH.If a page fault occurs.If alignment checking is enabled and an unaligned memory reference is made.Compatibility Mode ExceptionsSame as for protected mode exceptions.<strong>64</strong>-Bit Mode Exceptions#SS(0)#AC(0)If the memory address is in a non-canonical form.If alignment checking is enabled and an unaligned memory reference is made while thecurrent privilege level is 3.2-284 Vol. 1

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