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Intel® Extended Memory 64 Technology Software Developer's Guide

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CHAPTER 2INSTRUCTION SET REFERENCE (A-L)Chapter 2, Instruction Set Reference (A-L), starts an alphabetical discussion of IA-32 instructions (A-L). This discussionis continued in Chapter 3, Intel ® <strong>Extended</strong> <strong>Memory</strong> <strong>64</strong> <strong>Technology</strong> <strong>Software</strong> Developer’s <strong>Guide</strong>, Volume 2.This chapter describes new instructions in Intel ® EM<strong>64</strong>T and the existing IA-32 instruction set in IA-32e modes. Thisdescription includes general-purpose, x87 FPU, MMX TM , SSE, SSE2, SSE3 and system instructions. Instructiondescriptions are arranged in alphabetical order.For each instruction, forms are given for each operand combination. This includes the opcode, operands required, anda description. Also given for each instruction:• a description of the instruction and its operands• an operational description• a description of the effect of the instructions on flags in the EFLAGS register• a summary of the exceptions that can be generated2.1. INTERPRETING THE INSTRUCTION REFERENCE PAGESThis section describes the presentation format of this chapter. It covers notational conventions and abbreviations. Thefollowing is an example of the format used in the remainder of the chapter.2.1.1. The Instruction Summary TableThe presentation of each instruction opens with an “Instruction Summary Table” like the following example.CMC—Complement Carry Flag (example section with explanation...)Opcode Instruction <strong>64</strong>-bit Mode Compat/Leg DescriptionModeF5 CMC Valid Valid Complement carry flagThe information in each column is described below.2.1.1.1. Opcode Column in the Instruction Summary TableThe “Opcode” column gives the object code produced for each form of the instruction. When possible, the codes aregiven as hexadecimal bytes, in the same order in which they appear in memory. Definitions of entries other than hexadecimalbytes are as follows:• REX.W — Indicates the use of a REX prefix that affects operand size or instruction semantics. The ordering ofthe REX prefix and other optional/mandatory instruction prefix is discussed in Chapter 1, Figure 1-1. The use ofa REX prefix that results in promoting the legacy instruction behavior to <strong>64</strong>-bits is not listed explicitly in theopcode column.• /digit — A digit between 0 and 7 indicates that the ModR/M byte of the instruction uses only the r/m (register ormemory) operand. The reg field contains the digit that provides an extension to the instruction's opcode.• /r — Indicates that the ModR/M byte of the instruction contains both a register operand and an r/m operand.• cb, cw, cd, cp, co, ct — A 1-byte (cb), 2-byte (cw), 4-byte (cd), 6-byte (cp), 8-byte (co) or 10-byte (ct) valuefollowing the opcode that is used to specify a code offset and possibly a new value for the code segment register.Vol. 1 2-1

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