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Intel® Extended Memory 64 Technology Software Developer's Guide

Intel® Extended Memory 64 Technology Software Developer's Guide

Intel® Extended Memory 64 Technology Software Developer's Guide

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Protected Mode Exceptions#GP(0)If a memory operand effective address is outside the CS, DS, ES, FS, or GS segment limit.If the DS, ES, FS, or GS register contains a null segment selector.#SS(0)If a memory operand effective address is outside the SS segment limit.#NMEM or TS in CR0 is set.#MFIf there is a pending x87 FPU exception.#PF(fault-code) If a page fault occurs.#AC(0)If alignment checking is enabled and an unaligned memory reference is made while thecurrent privilege level is 3.Real-Address Mode Exceptions#GPIf a memory operand effective address is outside the CS, DS, ES, FS, or GS segment limit.#SSIf a memory operand effective address is outside the SS segment limit.#NMEM or TS in CR0 is set.#MFIf there is a pending x87 FPU exception.Virtual-8086 Mode Exceptions#GP(0)If a memory operand effective address is outside the CS, DS, ES, FS, or GS segment limit.#SS(0)If a memory operand effective address is outside the SS segment limit.#NMEM or TS in CR0 is set.#MFIf there is a pending x87 FPU exception.#PF(fault-code) If a page fault occurs.#AC(0)If alignment checking is enabled and an unaligned memory reference is made.Compatibility Mode ExceptionsSame as for protected mode exceptions.<strong>64</strong>-Bit Mode Exceptions#SS(0)If a memory address referencing the SS segment is in a non-canonical form.#GP(0)If the memory address is in a non-canonical form.#NMEM or TS in CR0 is set.#MFIf there is a pending x87 FPU exception.#PF(fault-code) If a page fault occurs.#AC(0)If alignment checking is enabled and an unaligned memory reference is made while thecurrent privilege level is 3.2-172 Vol. 1

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