Single-Chip Low Cost Low Power RF-Transceiver (Rev. A)

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CC2500Fixed packet length mode is selected bysetting PKTCTRL0.LENGTH_CONFIG=0. Thedesired packet length is set by the PKTLENregister.In variable packet length mode,PKTCTRL0.LENGTH_CONFIG=1, the packetlength is configured by the first byte after thesync word. The packet length is defined as thepayload data, excluding the length byte andthe optional automatic CRC. The PKTLENregister is used to set the maximum packetlength allowed in RX. Any packet received witha length byte with a value greater thanPKTLEN will be discarded.With PKTCTRL0.LENGTH_CONFIG=2, thepacket length is set to infinite and transmissionand reception will continue until turned offmanually. The infinite mode can be turned offwhile a packet is being transmitted or received.As described in the next section, this can beused to support packet formats with differentlength configuration than natively supported byCC2500.15.2.1 Arbitrary Length Field ConfigurationThe fixed length field can be reprogrammedduring receive and transmit. This opens thepossibility to have a different length fieldconfiguration than supported for variablelength packets. At the start of reception, thepacket length is set to a large value. The MCUreads out enough bytes to interpret the lengthfield in the packet. Then the PKTLEN value isset according to this value. The end of packetwill occur when the byte counter in the packethandler is equal to the PKTLEN register. Thus,the MCU must be able to program the correctlength, before the internal counter reaches thepacket length.By utilizing the infinite packet length option,arbitrary packet length is available. At the startof the packet, the infinite mode must be active.On the TX side, the PKTLEN register is set tomod(length, 256). On the RX side theMCU reads out enough bytes to interpret thelength field in the packet and sets the PKTLENregister to mod(length, 256). When lessthan 256 bytes remains of the packet the MCUdisables infinite packet length and activatesfixed length packets. When the internal bytecounter reaches the PKTLEN value, thetransmission or reception ends. AutomaticCRC appending/checking can be used (bysetting PKTCTRL0.CRC_EN to 1).When for example a 600-byte packet is to betransmitted, the MCU should do the following(see also Figure 12):• Set PKTCTRL0.LENGTH_CONFIG=2 (10).• Pre-program the PKTLEN register tomod(600,256)=88.• Transmit at least 345 bytes, for exampleby filling the 64-byte TX FIFO six times(384 bytes transmitted).• Set PKTCTRL0.LENGTH_CONFIG=0 (00).• The transmission ends when the packetcounter reaches 88. A total of 600 bytesare transmitted.Internal byte counter in packet handler counts from 0 to 255 and then starts at 0 again0,1,..........,88,....................255,0,........,88,..................,255,0,........,88,..................,255,0,.......................Infinite packet length enabledFixed packet lengthenabled when less than256 bytes remains ofpacketLength field transmitted and received. Rx and Tx PKTLEN value set to mod(600,256) = 88Figure 12: Arbitrary length field configuration600 bytes transmitted andreceivedPRELIMINARY Data Sheet (<strong>Rev</strong>.1.2) SWRS040A Page 28 of 83
CC250015.3 Packet Filtering in Receive ModeCC2500 supports three different packet-filteringcriteria: address filtering, maximum lengthfiltering and CRC filtering.15.3.1 Address FilteringSetting PKTCTRL1.ADR_CHK to any othervalue than zero enables the packet addressfilter. The packet handler engine will comparethe destination address byte in the packet withthe programmed node address in the ADDRregister and the 0x00 broadcast address whenPKTCTRL1.ADR_CHK=10 or both 0x00 and0xFF broadcast addresses whenPKTCTRL1.ADR_CHK=11. If the receivedaddress matches a valid address, the packet isreceived and written into the RX FIFO. If theaddress match fails, the packet is discardedand receive mode restarted (regardless of theMCSM1.RXOFF_MODE setting).If the received address matches a validaddress when the packet length is set toinfinite and address filtering is enabled, 0xFFwill be written into the RX FIFO followed by theaddress byte and then the payload data.15.3.2 Maximum Length FilteringIn the variable packet length mode thePKTLEN.PACKET_LENGTH register value isused to set the maximum allowed packetlength. If the received length byte has a largervalue than this, the packet is discarded andreceive mode restarted (regardless of theMCSM1.RXOFF_MODE setting).15.3.3 CRC FilteringThe filtering of a packet when CRC check failsis enabled with PKTCTRL1.CRC_AUTOFLUSH.The CRC auto flush function will flush theentire RX FIFO if the CRC check fails. Afterauto flushing the RX FIFO, the next statedepends on the MCSM1.RXOFF_MODE setting.PKTCTRL0.CC2400_EN must be 0 (default)for the CRC auto flush function to workcorrectly.When using the auto flush function, themaximum packet length is 63 bytes in variablepacket length mode and 64 bytes in fixedpacket length mode. Note that the maximumallowed packet length is reduced by two byteswhen PKTCTRL1.APPEND_STATUS isenabled, to make room in the RX FIFO for thetwo status bytes appended at the end of thepacket. Since the entire RX FIFO is flushedwhen the CRC check fails, the previouslyreceived packet must be read out of the FIFObefore receiving the current packet. The MCUmust not read from the current packet until theCRC has been checked as OK.15.4 CRC CheckThere are two different CRC implementations.PKTCTRL0.CC2400_EN selects between the2 options. The CRC check is different for the 2options. Refer also to the CC2500 Errata Note.15.4.1 PKTCTRL0.CC2400_EN = 0If PKTCTRL0.CC2400_EN =0 it is possible toread back the CRC status in 2 different ways:1) Set PKTCTRL1.APPEND_STATUS=1 andread the CRC_OK flag in the MSB of thesecond byte appended to the RX FIFO afterthe packet data. This requires double bufferingof the packet, i.e. the entire packet content ofthe RX FIFO must be completely read outbefore it is possible to check whether the CRCindication is OK or not.2) To avoid reading the entire RX FIFO,another solution is to use thePKTCTRL1.CRC_AUTOFLUSH feature. If thisfeature is enabled, the entire RX FIFO will beflushed if the CRC check fails. IfGDOx_CFG=0x06 the GDOx pin will beasserted when a sync word is found. TheGDOx pin will be de-asserted at the end of thepacket. When the latter occurs the MCUshould read the number of bytes in the RXFIFO from the RXBYTES.NUM_RXBYTESstatus register. If RXBYTES.NUM_RXBYTES=0the CRC check failed and the FIFO is flushed.If RXBYTES.NUM_RXBYTES>0 the CRC checkwas OK and data can be read out of the FIFO.15.4.2 PKTCTRL0.CC2400_EN = 1If PKTCTRL0.CC2400_EN = 1 the CRC can bechecked as outlined in 1) in Section 15.4.1 aswell as by reading the CRC_OK flag availablein the PKTSTATUS[7] register, in the LQI[7]status register or from one of the GDO pins ifGDOx_CFG is 0x07 or 0x15.The PKTCTRL1.CRC_AUTOFLUSH or datawhitening cannot be used whenPKTCTRL0.CC2400_EN = 1.15.5 Packet Handling in Transmit ModeThe payload that is to be transmitted must bewritten into the TX FIFO. The first byte writtenmust be the length byte when variable packetPRELIMINARY Data Sheet (<strong>Rev</strong>.1.2) SWRS040A Page 29 of 83
Page 1 and 2: CC2500CC2500Single Chip Low Cost Lo
Page 3 and 4: CC2500Table of ContentsAPPLICATIONS
Page 5 and 6: CC250033 ORDERING INFORMATION......
Page 7 and 8: CC25004 Electrical Specifications4.
Page 9 and 10: CC2500Parameter Min Typ Max Unit Co
Page 11 and 12: CC25004.5 Low Power RC OscillatorTc
Page 13 and 14: CC25005 Pin ConfigurationSIGNDDGUAR
Page 15 and 16: CC25006 Circuit DescriptionRADIO CO
Page 17 and 18: CC2500Component Value ManufacturerC
Page 19 and 20: CC2500Figure 6: SmartRF ® Studio u
Page 21 and 22: CC250010.1 Chip Status ByteWhen the
Page 23 and 24: CC250010.6 PATABLE AccessThe 0x3E a
Page 25 and 26: CC2500MDMCFG4.MDMCFG4.CHANBW_ECHANB
Page 27: CC2500Figure 10: Data whitening in
Page 31 and 32: CC2500Phase shifts are performed wi
Page 33 and 34: CC2500Carrier Sense (CS) can be use
Page 35 and 36: CC25001) Storing codeddata2) Transm
Page 37 and 38: CC2500If the XOSC is forced on, the
Page 39 and 40: CC2500The programmable conditions a
Page 41 and 42: CC2500fcarrier=f2CHANSPC _ E−( FR
Page 43 and 44: CC2500Output power,typical, +25°C,
Page 45 and 46: CC25003530252015Selectivity [dB]105
Page 47 and 48: CC2500GDOx_CFG[5:0]] Description0 (
Page 49 and 50: CC250030.2 Frequency Hopping and Mu
Page 51 and 52: CC250031 Configuration RegistersThe
Page 53 and 54: CC2500Address Register Description
Page 55 and 56: CC250031.1 Configuration Register D
Page 57 and 58: CC25000x07: PKTCTRL1 - Packet autom
Page 59 and 60: CC25000x0B: FSCTRL1 - Frequency syn
Page 61 and 62: CC25000x12: MDMCFG2 - Modem configu
Page 63 and 64: CC25000x15: DEVIATN - Modem deviati
Page 65 and 66: CC25000x17: MCSM1 - Main Radio Cont
Page 67 and 68: CC25000x19: FOCCFG - Frequency Offs
Page 69 and 70: CC25000x1B: AGCCTRL2 - AGC controlB
Page 71 and 72: CC25000x1D: AGCCTRL0 - AGC controlB
Page 73 and 74: CC25000x22: FREND0 - Front end TX c
Page 75 and 76: CC25000x2C: TEST2 - Various test se
Page 77 and 78: CC25000x36 (0xF6): WORTIME1 - High
Page 79 and 80:
CC250032.1 Recommended PCB layout f
Page 81 and 82:
CC250034.2 Product Status Definitio
Page 83 and 84:
CC2500AsiaPhone International +886-
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Single-Chip Low Cost Low Power RF-Transceiver (Rev. A)

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