Single-Chip Low Cost Low Power RF-Transceiver (Rev. A)

CC2500WriteReadSingle byte Burst Single byte Burst+0x00 +0x40 +0x80 +0xC00x00IOCFG20x01IOCFG10x02IOCFG00x03FIFOTHR0x04SYNC10x05SYNC00x06PKTLEN0x07PKTCTRL10x08PKTCTRL00x09ADDR0x0ACHANNR0x0BFSCTRL10x0CFSCTRL00x0DFREQ20x0EFREQ10x0FFREQ00x10MDMCFG40x11MDMCFG30x12MDMCFG20x13MDMCFG10x14MDMCFG00x15DEVIATN0x16MCSM20x17MCSM10x18MCSM00x19FOCCFG0x1ABSCFG0x1BAGCCTRL20x1CAGCCTRL10x1DAGCCTRL00x1EWOREVT10x1FWOREVT00x20WORCTRL0x21FREND10x22FREND00x23FSCAL30x24FSCAL20x25FSCAL10x26FSCAL00x27RCCTRL10x28RCCTRL00x29FSTEST0x2APTEST0x2BAGCTEST0x2CTEST20x2DTEST10x2ETEST00x2F0x30 SRES SRES PARTNUM0x31 SFSTXON SFSTXON VERSION0x32 SXOFF SXOFF FREQEST0x33 SCAL SCAL LQI0x34 SRX SRX RSSI0x35 STX STX MARCSTATE0x36 SIDLE SIDLE WORTIME10x37WORTIME00x38 SWOR SWOR PKTSTATUS0x39 SPWD SPWD VCO_VC_DAC0x3A SFRX SFRX TXBYTES0x3B SFTX SFTX RXBYTES0x3C SWORRST SWORRST0x3D SNOP SNOP0x3E PATABLE PATABLE PATABLE PATABLE0x3F TX FIFO TX FIFO RX FIFO RX FIFOR/W configuration registers, burst access possibleCommand Strobes, Status registers (read only)and multi byte registersTable 37: SPI address spacePRELIMINARY Data Sheet (Rev.1.2) SWRS040A Page 54 of 83