Single-Chip Low Cost Low Power RF-Transceiver (Rev. A)

CC2500length is enabled. The length byte has a valueequal to the payload of the packet (includingthe optional address byte). If fixed packetlength is enabled, then the first byte written tothe TX FIFO is interpreted as the destinationaddress, if this feature is enabled in the devicethat receives the packet.The modulator will first send the programmednumber of preamble bytes. If data is availablein the TX FIFO, the modulator will send thetwo-byte (optionally 4-byte) sync word andthen the payload in the TX FIFO. If CRC isenabled, the checksum is calculated over allthe data pulled from the TX FIFO and theresult is sent as two extra bytes at the end ofthe payload data.If whitening is enabled, the length byte,payload data and the two CRC bytes will bewhitened. This is done before the optionalFEC/Interleaver stage. Whitening is enabledby setting PKTCTRL0.WHITE_DATA=1.If FEC/Interleaving is enabled, the length byte,payload data and the two CRC bytes will bescrambled by the interleaver, and FECencoded before being modulated.15.6 Packet Handling in Receive ModeIn receive mode, the demodulator and packethandler will search for a valid preamble andthe sync word. When found, the demodulatorhas obtained both bit and byte synchronismand will receive the first payload byte.If FEC/Interleaving is enabled, the FECdecoder will start to decode the first payloadbyte. The interleaver will de-scramble the bitsbefore any other processing is done to thedata.If whitening is enabled, the data will be dewhitenedat this stage.When variable packet length is enabled, thefirst byte is the length byte. The packet handlerstores this value as the packet length andreceives the number of bytes indicated by thelength byte. If fixed packet length is used, thepacket handler will accept the programmednumber of bytes.Next, the packet handler optionally checks theaddress and only continues the reception if theaddress matches. If automatic CRC check isenabled, the packet handler computes CRCand matches it with the appended CRCchecksum.At the end of the payload, the packet handlerwill optionally write two extra packet statusbytes that contain CRC status, link qualityindication and RSSI value.16 Modulation FormatsCC2500 supports amplitude, frequency andphase shift modulation formats. The desiredmodulation format is set in theMDMCFG2.MOD_FORMAT register.Optionally, the data stream can be Manchestercoded by the modulator and decoded by thedemodulator. This option is enabled by settingMDMCFG2.MANCHESTER_EN=1. Manchesterencoding is not supported at the same time asusing the FEC/Interleaver option.16.1 Frequency Shift KeyingFSK can optionally be shaped by a Gaussianfilter with BT=1, producing a GFSK modulatedsignal.The frequency deviation is programmed withthe DEVIATION_M and DEVIATION_E valuesin the DEVIATN register. The value has anexponent/mantissa form, and the resultantdeviation is given by:fdevf=2xoscDEVIATION _ E⋅ (8 + DEVIATION _ M ) ⋅ 217The symbol encoding is shown in Table 23.Format Symbol CodingFSK\GFSK ‘0’ – Deviation‘1’ + DeviationTable 23: Symbol encoding for FSKmodulation16.2 Minimum Shift KeyingWhen using MSK 1 , the complete transmission(preamble, sync word and payload) will beMSK modulated.1Identical to offset QPSK with half-sineshaping (data coding may differ)PRELIMINARY Data Sheet (Rev.1.2) SWRS040A Page 30 of 83