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Single-Chip Low Cost Low Power RF-Transceiver (Rev. A)

Single-Chip Low Cost Low Power RF-Transceiver (Rev. A)

Single-Chip Low Cost Low Power RF-Transceiver (Rev. A)

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CC25000x08: PKTCTRL0 – Packet automation controlBit Field Name Reset R/W Description7 Reserved R06 WHITE_DATA 1 R/W Turn data whitening on / off0: Whitening off1: Whitening onData whitening can only be used whenPKTCTRL0.CC2400_EN = 0 (default).5:4 PKT_FORMAT[1:0] 0 (00) R/W Format of RX and TX dataSettingPacket format0 (00) Normal mode, use FIFOs for RX and TX1 (01)Serial Synchronous mode, used for backwardscompatibility. Data in on GDO02 (10)3 (11)Random TX mode; sends random data using PN9generator. Used for test.Works as normal mode, setting 0 (00), in RX.Asynchronous transparent mode. Data in on GDO0and Data out on either of the GDO pins3 CC2400_EN 0 R/W Enable CC2400 support. Use same CRC implementation asCC2400.PKTCTRL1.CRC_AUTOFLUSH must be 0 ifPKTCTRL0.CC2400_EN = 1.PKTCTRL0.WHITE_DATA must be 0 ifPKTCTRL0.CC2400_EN = 1.2 CRC_EN 1 R/W 1: CRC calculation in TX and CRC check in RX enabled0: CRC disabled for TX and RX1:0 LENGTH_CONFIG[1:0] 1 (01) R/W Configure the packet lengthSettingPacket length configuration0 (00) Fixed length packets, length configured inPKTLEN register1 (01) Variable length packets, packet length configuredby the first byte after sync word2 (10) Enable infinite length packets3 (11) Reserved0x09: ADDR – Device addressBit Field Name Reset R/W Description7:0 DEVICE_ADDR[7:0] 0 (0x00) R/W Address used for packet filtration. Optional broadcastaddresses are 0 (0x00) and 255 (0xFF).0x0A: CHANNR – Channel numberBit Field Name Reset R/W Description7:0 CHAN[7:0] 0 (0x00) R/W The 8-bit unsigned channel number, which is multiplied by thechannel spacing setting and added to the base frequency.PRELIMINARY Data Sheet (<strong>Rev</strong>.1.2) SWRS040A Page 58 of 83

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