DVD Demystified

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Chapter 3
copies can be made with no error. However, when the component receiving
a signal must reconstruct the analog waveform, then it must recover the
clock as well as the data. In this case, the equipment should reduce jitter as
much as possible before regenerating the signal. The problem is that there
is a tradeoff between data accuracy and jitter reduction. Receiver circuitry
designed to minimize data errors sacrifices jitter attenuation. 15 The ultimate
solution is to decouple the data from the clock. Some manufacturers
have approached this goal by putting the master clock in the DAC (which
is probably the best place for it) and having it drive the servo mechanism
and readout speed of the drive. RAM-buffered time-base correction in the
receiver is another option. This reclocks incoming bits by letting them pile
up in a line behind a little digital gate that opens and closes to let them out
in a retimed sequence. This technique removes all incoming jitter but introduces
a delay in the signal. The accuracy of the gate determines how much
new jitter is created.
The quality of digital interconnect cables makes a difference, but only up
to a point. The more bandwidth in the cable, the less jitter there is. Note
that a “digital audio” cable is actually transmitting an analog electrical or
optical signal. There is a digital-analog conversion step at the transmitter
and an analog-digital conversion step at the receiver. This is the reason
interface jitter can be a problem. However, the problem is less serious than
when an analog interface cable is used because no resampling of analog signal
values occurs.
Much ado is made about high-quality transports—disc readers that
minimize jitter to improve audio and video quality. High-end systems often
separate the transport unit from other units, which ironically introduces a
new source of jitter in the interface cable. Jitter from the transport is a
function of the oscillator, the internal circuitry, and the signal output transmitter.
In theory, media jitter and transport jitter should be irrelevant, but
in reality, the oscillator circuitry is often integrated into a larger chip, so
leakage can occur between circuits. It is also possible for the servo motors
to cause fluctuations in the power supply that affect the crystal oscillator,
especially if they are working extra hard to read a suboptimal disc. Other
factors such as instability in the oscillator crystal, temperature, and physical
vibration may introduce jitter. A jitter-free receiver changes every-
15 The jitter tolerance characteristic of a PLL circuit is inversely proportional to its jitter attenuation
characteristic. That is, the more “slack” the circuit allows in signal transition timing, the
more jitter gets through. This situation can be improved by using two PLLs to create a two-stage
clock recovery circuit.