TC1765_ds_v12 (TC1765_ds_v12_1202.pdf) - Infineon

Preliminary
32-Bit Single-Chip Microcontroller
TriCore Family
TC1765
High Performance 32-bit TriCore CPU with 4-Stage Pipeline
– 25 ns Instruction Cycle Time at 40 MHz CPU/System Clock
Dual Issue super-scalar implementation
– Instruction triple issue
Circular Buffer and bit-reverse addressing modes for DSP algorithms
Flexible multi-master interrupt system
Very fast interrupt response time
Hardware controlled context switch for task switch and interrupts
48 Kbytes of on-chip SRAM for data and time critical code
8-channel DMA Controller for FPI Bus transactions
Built-in calibration support
On-chip Flexible Peripheral Interface Bus (FPI Bus) for interconnections of functional
units
External Bus Interface Unit (EBU) with dedicated pins used for
– Communication with external data memories and peripheral units
– Instruction fetches from external Burst Flash program memories
On-Chip Peripheral Units
– General Purpose Timer Array (GPTA) with a powerful set of digital signal filtering
and timer functionality to realize autonomous and complex I/O management
– Multifunctional General Purpose Timer Unit (GPTU) with three 32-bit timer/counters
– Two Asynchronous/Synchronous Serial Channels (ASC0, ASC1) with baudrate
generator, parity, framing and overrun error detection
– Two High Speed Synchronous Serial Channels (SSC0, SSC1) with programmable
data length and shift direction
– TwinCAN Module with two interconnected CAN nodes for high efficiency data
handling via FIFO buffering and gateway data transfer
– Two Analog-to-Digital Converter Units (ADC0, ADC1) with 8-bit, 10-bit, or 12-bit
resolution and 24 analog inputs
– Watchdog Timer and System Timer
77 digital general purpose I/O lines and one 24-bit analog port
On-chip Debug Support
Power Management System
Clock Generation Unit with PLL
Two derivatives with upward compatible pin configuration
– TC1765N
– TC1765T (with additional 16-bit OCDS Level 2 trace port)
Ambient temperature under bias: -40 °C to +125 °C
P-LBGA-260 package
Data Sheet 1 V1.2, 2002-12