TC1765_ds_v12 (TC1765_ds_v12_1202.pdf) - Infineon
TC1765_ds_v12 (TC1765_ds_v12_1202.pdf) - Infineon
TC1765_ds_v12 (TC1765_ds_v12_1202.pdf) - Infineon
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Preliminary<br />
AD Converter Characteristics<br />
VSS = 0 V; TA = -40 °C to +125 °C;<br />
Parameter Symbol Limit Values Unit Test<br />
min. typ. max.<br />
Conditions<br />
Analog supply voltages VDDAx SR 2.25 2.5 2.75 V 1)<br />
VDDM SR 4.5 5 5.25 V –<br />
Analog ground voltage VSSAx SR -0.1 – 0.1 V 1)<br />
Analog reference<br />
voltage<br />
Analog reference<br />
ground<br />
Analog input voltage<br />
range<br />
V AREFx SR 4 – V DDM + 0.05 V<br />
VAGNDx SR VSSAx -<br />
0.05<br />
VAIN SR VAGNDx – VAREFx V 1)<br />
<strong>TC1765</strong><br />
Data Sheet 65 V1.2, 2002-12<br />
1)2)<br />
– V SSAx + 0.05 V 1)3)<br />
Internal ADC clock f ANA 0.5 – 5 MHz –<br />
Power-up calibration<br />
time<br />
t PUC CC – – 3328 × (3 +<br />
CON.CPS)<br />
× t BC<br />
Sample time t S CC (3 + CON.CPS) ×<br />
(CHCONn.STC + 2) × t BC<br />
µs –<br />
6 × tBC – – µs<br />
Conversion time tC CC tS + (30 + CON.CPS × 4)<br />
× tBC + 2 × tDIV µs for 8-bit conv. 4)<br />
tS + (36 + CON.CPS × 4)<br />
× tBC + 2 × tDIV µs for 10-bit conv. 4)<br />
ts + (42 + CON.CPS × 4)<br />
× tBC + 2 × tDIV µs for 12-bit conv. 4)<br />
Total unadjusted error TUE 5) CC – – ±1 LSB for 8-bit conv.<br />
– – ±2 LSB for 10-bit conv.<br />
– – ±6 LSB for 12-bit conv.<br />
Overload current6) I 7)<br />
AOV1 CC -2 – +5 mA –<br />
-2 0 mA kA =1.0 × 10 -3<br />
Overload coupling factor<br />
9)<br />
0 +5 mA k A =1.0 × 10 -4<br />
I 8)<br />
AOV2 CC -4 – +10 mA –<br />
-4 0 mA kA =1.0 × 10-3 0 +10 mA k A =1.0 × 10 -4<br />
k A CC – – 1.0 × 10 -3 – see I AOV1 and<br />
I AOV2<br />
1.0 × 10 -4 –<br />
µs<br />
4)