TC1765_ds_v12 (TC1765_ds_v12_1202.pdf) - Infineon
TC1765_ds_v12 (TC1765_ds_v12_1202.pdf) - Infineon
TC1765_ds_v12 (TC1765_ds_v12_1202.pdf) - Infineon
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Preliminary<br />
<strong>TC1765</strong><br />
Power Supply<br />
Figure 18 shows the <strong>TC1765</strong>’s power supply concept, where certain logic modules are<br />
individually supplied with power. This concept improves the EMI behavior by reduction<br />
of the noise cross coupling. Also the operation margin is improved in sensitive modules<br />
like the A/D converter by noise reduction.<br />
<strong>TC1765</strong><br />
DMU PMU<br />
V DDSBRAM<br />
(2.5 V)<br />
V SS<br />
V DDA0<br />
(2.5 V)<br />
V SSA0<br />
V DDRAM<br />
(2.5 V)<br />
V SS<br />
ADC0<br />
Control Logic<br />
GPIO Ports<br />
(P0-P5) &<br />
dedicated<br />
Pins<br />
V DDP<br />
(3.3 - 5 V)<br />
V SS<br />
Figure 18 <strong>TC1765</strong> Power Supply Concept<br />
V DDM<br />
(5 V)<br />
V SSM<br />
ADC1<br />
Control Logic<br />
CPU &<br />
Control &<br />
Peripherals<br />
EBU, TP<br />
V DD<br />
(2.5 V)<br />
V SS<br />
V DDA1<br />
(2.5 V)<br />
V SSA1<br />
OSC<br />
V DDOSC<br />
(2.5 V)<br />
V SSOSC<br />
MCD05227<br />
Data Sheet 53 V1.2, 2002-12
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