TC1765_ds_v12 (TC1765_ds_v12_1202.pdf) - Infineon

Preliminary
Input Clock Timing
VDDOSC = 2.30 to 2.75 V; VSSOSC = 0 V; TA = -40 °C to +125 °C;
Figure 27 Input Clock Timing
TC1765
Parameter Symbol Limit Values Unit
min. max.
Oscillator clock frequency direct drive
with PLL
fOSC SR
(= 1/tOSC) 4
10
16
16
MHz
MHz
Input clock frequency driving
at XTAL1
direct drive
with PLL
1/tOSCDD SR
–
10
40
30
MHz
MHz
Input clock high time t1 SR 7 – ns
Input clock low time t2 SR 7 – ns
Input clock rise time t3 SR – 4 ns
Input clock fall time t4 SR – 4 ns
Input Clock
at XTAL1
0.5 V DDOSC
t 1
t OSC
MCT04882
Data Sheet 72 V1.2, 2002-12
t 2
t 4
t 3
V IHX
V ILX