TC1765_ds_v12 (TC1765_ds_v12_1202.pdf) - Infineon
TC1765_ds_v12 (TC1765_ds_v12_1202.pdf) - Infineon
TC1765_ds_v12 (TC1765_ds_v12_1202.pdf) - Infineon
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Preliminary<br />
Power Supply Current<br />
TA = -40 °C to +125 °C;<br />
<strong>TC1765</strong><br />
Parameter Symbol Limit Values Unit Test Conditions<br />
min. typ. 1)<br />
max.<br />
Active mode supply current IDD CC – – 200 mA<br />
2)3)<br />
PORST = VIL 1) Parameters in this column are tested at 25 °C, 40 MHz system clock (if applicable) and nominal VDD voltages.<br />
2) These parameters are tested at VDDmax and 40 MHz system clock (bypass mode) with all outputs<br />
disconnected and all inputs at V IL or V IH .<br />
3) These power supply currents are defined as the sum of all currents at the VDD power supply lines:<br />
V DD + V DDP + V DDRAM + V DDSBRAM + V DDOSC + V DDM + V DDA0 + V DDA1<br />
– 260 290 mA Sum of I DDS 4)3)<br />
– 7 10 mA I DD at V DDP 4)<br />
– 201 – mA I DD at V DD<br />
(Core and EBU) 4)<br />
– 31 – mA<br />
4)<br />
IDD at VDDRAM – 21 4)<br />
120 5)<br />
mA IDD at VDDSBRAM – 0.1 – mA<br />
4)<br />
IDD at VDDAx Idle mode supply current I ID CC – 123 – mA PORST = V IH 2)6)7)<br />
Sleep mode supply current I SL CC – 50 – mA PORST = V IH 2)7)<br />
Deep sleep mode supply<br />
current<br />
Stand-by pin power supply<br />
current<br />
4) These power consumption characteristics are measured while running a typical application pattern. The power<br />
consumption of modules can increase or decrease using other application programs. The PLL is inactive<br />
during this measurement.<br />
5)<br />
This parameter has been evaluated at design characterization using an atypical test pattern that makes<br />
extensive usage of the DMU memory.<br />
6) All peripherals are enabled and in idle state.<br />
7) Guaranteed by design characterization.<br />
8) This is the sum of all 2.5 V power supply currents.<br />
9) This is the sum of all 5 V power supply currents.<br />
10) <strong>TC1765</strong> in deep sleep mode.<br />
11) All other VDD pins are at 0 V; T J = 150 °C; V DDSBRAM = 2.0 V.<br />
I DS CC – 5 900 µA PORST = V IH 8)<br />
– 1 4.4 mA<br />
9)<br />
PORST = VIH ISB CC – 1 250 µA<br />
10)<br />
IDD at VDDSBRAM – 1 200 µA<br />
Data Sheet 69 V1.2, 2002-12<br />
11)