MC9S12VR-Family - Data Sheet - Freescale Semiconductor

1.7.2.21 IOC[3:0] Signals
MC9S12VR Family Reference Manual, Rev. 2.8
Device Overview MC9S12VR-Family
The signals IOC[3:0] are associated with the input capture or output compare functionality of the timer
(TIM) module.
1.7.3 Power Supply Pins
MC9S12VR-Family power and ground pins are described below. Because fast signal transitions place
high, short-duration current demands on the power supply, use bypass capacitors with high-frequency
characteristics and place them as close to the MCU as possible.
NOTE
All ground pins must be connected together in the application.
1.7.3.1 VDDX1, VDDX2, VSSX1,VSSX2 — Power Output Pins and Ground Pins
VDDX1 and VDDX2 are the 5V power supply output for the I/O drivers. This voltage is generated by the
on chip voltage regulator. Bypass requirements on VDDX1 and VDDX2 pins depend on how heavily the
MCU pins are loaded. All VDDX pins are connected together internally. All VSSX pins are connected
together internally.
NOTE
The high side driver ground pin VSSXHS mentioned in Chapter 13,
“High-Side Drivers - HSDRV (S12HSDRV1) is internally connected to
VSSX2 ground pin.
NOTE
Not all power and ground pins are available on all packages. Refer to pinout
section for further details.
1.7.3.2 VDDA, VSSA — Power Supply Pins for ADC
These are the power supply and ground input pins for the analog-to-digital converter and the voltage
regulator.
NOTE
The reference voltages VRH and VRL mentioned in Appendix C, “ATD
Electrical Specifications are internally connected to VDDA and VSSA.
1.7.3.3 VSS — Core Ground Pin
The voltage supply of nominally 1.8V is generated by the internal voltage regulator. The return current
path is through the VSS pin.
Freescale Semiconductor 35