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MC9S12VR-Family - Data Sheet - Freescale Semiconductor

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LIN Physical Layer (S12LINPHYV1)<br />

15.3.2.8 LIN Interrupt Flags Register (LPIF)<br />

Module Base + Address 0x0007 Access: User read/write 1<br />

7 6 5 4 3 2 1 0<br />

R 0 0 0 0 0 0 0<br />

LPOCIF<br />

W<br />

Reset 0 0 0 0 0 0 0 0<br />

15.4 Functional Description<br />

15.4.1 General<br />

= Unimplemented<br />

Table 15-11. LPIF Fields Description<br />

The LIN Physical Layer module implements the physical layer of the LIN interface. This physical layer<br />

can be driven by the SCI (Serial Communication Interface) module, the timer for bit banging or directly<br />

through the LPDR register.<br />

15.4.2 Slew Rate Selection<br />

Figure 15-9. LIN Interrupt Flags Register (LPIF)<br />

1 Read: Anytime<br />

Write: Writing ‘1’ sets the flags back, writing a ‘0’ has no effect<br />

Field Description<br />

0<br />

LPOCIF<br />

LIN Transmitter Over-Current Interrupt Flag<br />

LPOCIF is set to 1 when LPOC status bit changes. This flag can only be cleared by writing a 1. Writing a 0 has<br />

no effect. If interrupt requests are enabled (LPOCIE= 1), LPOCIF causes an interrupt request.<br />

0 No change in LPOC status bit.<br />

1 LPOC status bit has changed.<br />

Note: When entering standby mode, LPOCIF is not cleared.<br />

The slew rate can be selected for EMC (Electromagnetic compatibility) optimized operation at 10.4kBit/s<br />

and 20kBit/s as well as at fast baud rate (up to 250kBit/s) for test and programming. The slew rate can be<br />

chosen with the bits LPSLR[1:0] in the LIN Slew Rate Register (LPSLR). The default slew rate<br />

corresponds to 20kBit/s.<br />

Generally, changing the slew rate has an immediate effect on the rising/falling edges of the LIN signal.<br />

However, it is recommended to change the slew rate only in recessive state, and at least 2us before a falling<br />

edge of TXD. If the slew rate is changed less than 2us before a falling edge of TXD, the slew rate change<br />

may be effective only at the second next TXD falling edge.<br />

<strong>MC9S12VR</strong> <strong>Family</strong> Reference Manual, Rev. 2.8<br />

434 <strong>Freescale</strong> <strong>Semiconductor</strong>

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