MC9S12VR-Family - Data Sheet - Freescale Semiconductor

2.3.3 Port E Data Register (PORTE)
2.3.4 Port E Data Direction Register (DDRE)
MC9S12VR Family Reference Manual, Rev. 2.8
Port Integration Module (S12VRPIMV2)
Address 0x0008 Access: User read/write 1
7 6 5 4 3 2 1 0
R 0 0 0 0 0 0
W
Altern.
Function
1 Read: Anytime. The data source is depending on the data direction value.
Write: Anytime
PE1 PE0
— — — — — — XTAL EXTAL
Reset 0 0 0 0 0 0 0 0
Figure 2-1. Port E Data Register (PORTE)
Table 2-3. PORTE Register Field Descriptions
Field Description
1
PE
0
PE
PorT data register port E — General-purpose input/output data, CPMU OSC XTAL signal
If the CPMU OSC function is active this pin is used as XTAL signal and the pulldown device is
disabled. When not used with the alternative function, this pin can be used as general-purpose I/O.
In general-purpose output mode the register bit is driven to the pin.
If the associated data direction bit of this pin is set to 1, a read returns the value of the port register, otherwise the
synchronized pin input state is read.
• The CPMU OSC function takes precedence over the general purpose I/O function if enabled.
PorT data register port E — General-purpose input/output data, CPMU OSC EXTAL signal
If the CPMU OSC function is active this pin is used as EXTAL signal and the pulldown device is
disabled. When not used with the alternative function, this pin can be used as general-purpose I/O.
In general-purpose output mode the register bit is driven to the pin.
If the associated data direction bit of this pin is set to 1, a read returns the value of the port register, otherwise the
synchronized pin input state is read.
• The CPMU OSC function takes precedence over the general purpose I/O function if enabled.
Address 0x0009 Access: User read/write 1
1 Read: Anytime
Write: Anytime
7 6 5 4 3 2 1 0
R 0 0 0 0 0 0
W
DDRE1 DDRE0
Reset 0 0 0 0 0 0 0 0
Figure 2-2. Port E Data Direction Register (DDRE)
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