MC9S12VR-Family - Data Sheet - Freescale Semiconductor

Chapter 15
LIN Physical Layer (S12LINPHYV1)
Rev. No.
(Item No.)
V01.00
Date
(Submitted By)
15.1 Introduction
Table 15-1. Revision History Table
NOTE
The information given in this section are preliminary and should be used as
a guide only. Values in this section cannot be guaranteed by Freescale and
are subject to change without notice.
The LIN (Local Interconnect Network) bus pin provides a physical layer for single-wire communication
in automotive applications. The LIN Physical Layer is designed to meet the LIN Physical Layer 2.1
specification.
15.1.1 Features
Sections
Affected
10 Dec 2010 All
- Initial Version
Substantial Change(s)
Module LIN Physical Layer includes the following distinctive features:
• Compliant with LIN physical layer 2.1
• Standby mode with glitch-filtered wake-up.
• Slew rate selection optimized for the baud rates: 10.4kBit/s, 20kBit/s and Fast Mode (up to
250kBit/s).
• Selectable pull-up of 30kΩ or 330kΩ (in Shutdown Mode, 330kΩ only)
• Current limitation by LIN Bus pin rising and falling edges
• Over-current protection with transmitter shutdown
The LIN transmitter is a low side MOSFET with current limitation and over-current transmitter shutdown.
A selectable internal pull-up resistor with a serial diode structure is integrated, so no external pull-up
components are required for the application in a slave node. To be used as a master node, an external
resistor of 1kΩ must be placed in parallel between VSUP and the LIN Bus pin, with a diode between
VSUP and the resistor. The fall time from recessive to dominant and the rise time from dominant to
recessive is selectable and controlled to guarantee communication quality and reduce EMC emissions..
The symmetry between both slopes is guaranteed.
MC9S12VR Family Reference Manual, Rev. 2.8
Freescale Semiconductor 423