titus-larsen-titus-1981-apple-interfacing

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scheme is quite complex, and we recommend using the simple interrupt flag circuit provided in Fig. 7 -5. This should be sufficient for most uses. In the daisy-chain configuration, you cannot have "empty," or open, slots between interface circuit boards, since this will break the INT IN /INT OUT circuit "chain." Enough said about interrupts. For more information, we refer you to Programming & Interfacing the 6502, With Experiments (Howard W. Sams & Co., Inc., Indianapolis, IN 46268). DMA The DMA input is used to allow an external device to address memory locations without first having to go through the 6502 microprocessor. Thus, the external device has direct memory access, or DMA. Since several devices could request a direct memory access transfer of information, a daisy-chained set of peripherals is possible, since the interface slots have DMA IN and DMA OUT pins that connect to the adjacent interface connectors. Direct memory access interfaces are not trivial design projects, and we recommend that you thoroughly understand the operation of the 6502 microprocessor chip and its associated circuitry before you attempt to use this feature. R.!:S The reset line at pin 31, RES, is actually a bidirectional signal line. You can use this line to reset your interface circuits, since it will be a logic zero when the Apple is reset when power is applied, or when the RESET pushbutton is pressed. You can also force the Apple into a reset condition by grounding this line. If you choose to use this line to reset the Apple from your interface, a high-current open-collector gate or buffer must be used to pull the line to ground. An SN7407 open-collector buffer chip could be used in this type of circuit. The RES signal line is common to all of the interface slots. !NH In the Apple computer, you can substitute your own assemblylanguage programs for the programs stored in the BASIC interpreter ROMs. By pulling the INH line at pin 32 to ground, you will inhibit all of the BASIC interpreter and Monitor ROMs, so that your own programs can control the entire system. Since there is some room already available for this type of operation, you probably won't use this function, since you would not have access to any of the useful subroutines within the standard ROMs supplied with the Apple. It would be difficult, for example, to control the display, without the subroutines in the BASIC interpreter ROMs. You will need an opencollector buffer chip to pull this line to ground, if you choose to use this function.
USER 1 This input will allow you to inhibit the generation of all of the 1/0 SELECT and DEVICE SELECT signals within the Apple computer, so that you can "turn off' all of the 1/0 devices. This line must be pulled down to a logic zero to cause this action. To prevent the accidental use of this line, you must use a wire jumper to connect two solder pads on the main printed circuit board of the Apple, before the USER 1 signal can be used. We refer you to the A ple II Reference Manual for the necessary details. Since your primary purpose in using the 1/0 SELECT and DE VICE SELECT signals is to simplify your interface design, there is probably no need to use tl;iis line, unless you wish to do some sort of expansion of the computer system with 1/0 devices that are external to the basic system, or that might use some of the memory addresses that have been assigned to the I/ 0 SELECT and DEVICE SELECT signals. The USER 1 signal is present at pin 39 on the interface connectors. RDY There are times when it is necessary to slightly "delay" the 6502 microprocessor so that an external 1/0 device, or memory chip will have sufficient time to access its data and present it on the data bus. The ready input ( RDY) found at pin 21 on each of the interface connectors can be used to put the 6502 in a "wait" condition when it is grounded. This input must be synchronized with the microprocessor clock, and it should change its stte during the 1 clock logic one state. The RDY input was used in older 6502-based computers, since older memory devices could not access their data as fast as required by the computer. Thus, when they were addresses, they had to put the 6502 into a "wait" condition for several clock cycles until their data was available. We doubt that you will find much use for this signal, except in specialized interfaces. Clock Signals There are six clock signals that are available for interface use. These are 0, i, Q3, 7M, COLOR_REF, and SYNC. The 0 and 1 are the main timing clock signals, running at 1 MHz. The clock signals are the inverse of one another. These signals are used to coordinate external 1/0 operations with the normal flow of data on the bus. As shown in Fig. 5-12, the 1 signal is used to control the generation of the RD and WR signals for external 1/0 devices. The I/0 SELECT and DEVICE SELECT signals at the' I/0 connectors have a"lready been gated, or "qualified," with the cp1 clock signal. The Q3 signal is a 2 MHz clock signal that is as y mmetric; that is, 173
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lJ. 21862 APPLE® INTERFACING JONAT
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APPLE® INTERFACING by Jonathan A.
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Preface The purpose in writing this
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make no attempt to provide much det
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Contents CHAPTER 1 6502 PROCESSOR 9
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CHAPTER 1 6502 Processor The Apple
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Fig. 1- 1. 6502 Microprocessor chip
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locate the memory "cell" that is to
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IR.,view At this point, you should
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Gei'!eral-fi!Jrp@S('; I/ 0 Commaru:
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of an examined memory location. Fro
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will now explore the actions that e
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transfers will require more than ei
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grams are probably easier to write
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·when the Apple computer is progrn
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Y@bie ::!1. VNth i
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DECODED OUTPUT puter systems, the R
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1 1 1 Using Decoders In many cases,
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used in PEEK commands, for example
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An alternate approach is to use bot
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sections, but the address inputs, A
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fUNCTlON TABLES COMPARING CASCADING
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flexible decoding scheme, as shown
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until the power is turned off. Ther
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the logic zero state. In most cases
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ue in sequence (in binary), 255, 25
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DATA BUS DATA A SN74125 DATA B DATA
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R gates that control the enabling o
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state of the unused bits cannot be
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CHAPTER 4 Flags and Decisions n alm
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VALUE 00111010 00011010 11110000 00
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•• Addrss Byte Da;a Syie Mexacl
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INPUT DEVICE RD 49321 - READY/BUSY
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INPUT DEVICE INPUT PORT Dl Dl ' D3
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y-language programming will also be
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CHAPTER 5 Breadboarding 01 With the
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5 IN4001 (4) 6 ,.___'-'' N:...J LM3
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A15 AIO A13 Al2 Al4 All A9 AfJ D .L
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In the memory address mode, must pl
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PIN CONFIGURATION DJ, LOGIC DIAGRAM
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The actual ORing of these control s
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Fig. 5·10. Packaged version of the
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SIGNAL APPLE PfN INTERFACE PIN +12V
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·.chips have rather slow access ti
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are possible, we think that one exp
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in most of the experiments unless o
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tep 3 You may wish to test other po
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,..,,.,....,"'"' in the block from
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None of the outputs should be activ
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---" 2 CLR 20 2 CK Si\17474 The dev
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entered and run, It first asks you
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+5 Gl\ID LOGIC SWITCHES A B c D 16
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PR INT "O"; GOTO 65 If you wish to
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am, and the two-byte decimal calcul
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for each value that is input to the
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of the monitor screen each time the
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A = 128 420 B = PEEK(493 l 9) 430 F
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il!!lie -2. 0 THEN . . .
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program. You may forgotten steps to
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The A output, RD 49319, has already
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used the following program: FOR A =
Page 123 and 124: · numbers would have to be "split"
Page 125 and 126: tep 1 The input port and output por
Page 127 and 128: 0'"""c"y'·i- the relative values t
Page 129 and 130: and output ports are simply additio
Page 131 and 132: e has been divided into 256 values,
Page 133 and 134: e converter will not burn out, sinc
Page 135 and 136: 07 DATA BUS DO 3 4 7 a 13 14 17 18
Page 137 and 138: each decade. The bed code is used i
Page 139 and 140: LED BIT RED } D3 YELLOW EL M D4 GRE
Page 141 and 142: : : FOR T = 0 TO 770 NEX T T NEX T
Page 143 and 144: Thus, by testing the value input fr
Page 145 and 146: he six LEDs should be removed from
Page 147 and 148: Yo'1 should be able to develop the
Page 149 and 150: INPUT "LAST TWO DIGITS ";A$ IF A$ =
Page 151 and 152: tfhe program first tests the reset
Page 153 and 154: would you program the computer so t
Page 155 and 156: Yes. Simply reverse the commands at
Page 157 and 158: · computer to measure analog volta
Page 159 and 160: he minimum value should be in the r
Page 161 and 162: 130 Y2 = PEEK(49319)/ 1.594 140 HPL
Page 163 and 164: You probably will not see much chan
Page 165 and 166: D7 D6 D5 D4 D3 D2 Dl DO 'b- • "A"
Page 167 and 168: ll'i!i Name 1 1/0 SELECT 2- 17 A 15
Page 169 and 170: ADDRESS BUS A7-AO :> MEMORY 256 x 8
Page 171 and 172: !n!erfac" Slel Addwess lta"%Je 0 C0
Page 173: 28 INT IN SLOT 6 +5 lK Lr LOCAL INT
Page 177 and 178: puts. You must be careful in your d
Page 179 and 180: CONTROL/ DATA input at pin 12 ( C/D
Page 181 and 182: 93427 OR EQUIV ROM ADDRESS BUS 1---
Page 183 and 184: use of red LEDs is recommended, sin
Page 185 and 186: APPENDIX B Parts Required for the E
Page 187 and 188: APPENDIX 6502 Microprocessor Techni
Page 189 and 190: MC§f.500 IE1lriy {D"i) This input
Page 191 and 192: MCS6500 INSTilUCTION SH-ALPHABETICA
Page 193 and 194: ,, ,, T!M!NG Il-01! READING DI\ TA
Page 195 and 196: MCS0t-20 PWH¢01 ns PWH¢2 ¢11ou11
Page 197 and 198: APPENDIX D Apple Interface Breadboa
Page 199 and 200: APPENDIX E Printed-Circuit Board Ar
Page 201 and 202: !'i9. E-2. Printecl-
Page 203: F t • I +: a... :::> 0 a: (!> 0 (
Page 206 and 207: Controllers, 14 Converter analog-to
Page 208: Pin configuration-cont SN7474, 150
Page 211: The Blacksburg Group According to B
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