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DATA<br />

BUS<br />

DATA<br />

A<br />

SN74125<br />

DATA<br />

B<br />

DATA<br />

C<br />

DATA<br />

D<br />

fig. 3·3. Typical three·•awe b.,s fo fom devioes.<br />

A<br />

B BUS ENABLE<br />

C<br />

o<br />

INPUTS<br />

SN74126, is a pin-for-pin replacement for the SN74125, except<br />

it is enabled with a logic one and disabled with a logic zero.<br />

These chips serve to illustrate the action of three-state devices, but<br />

are not generally found in computer interface circuits, since<br />

useful devices are available.<br />

For purposes of illustration, a typical bus is shown in Fig. 3-8. In<br />

circuit, four one-bit devices have been connected to the bus.<br />

a one-bit bus is shown for clarity, although in an 8-bit bus syseight<br />

lines would be required. When one of the BUS ENABLE<br />

is placed in the logic zero state, the corresponding data bit<br />

through the buffer and onto the bus. We will assume that<br />

are no other devices connected to the bus. Thus, the truth table<br />

in Table 3-1 applies to this simple bus circuit.<br />

none of the buffers has been enabled or connected to the<br />

the bus is not connected to anything except the input of the<br />

·i:i

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