titus-larsen-titus-1981-apple-interfacing

In the memory address mode, must place the lowest switch at
IC-6 in Lhe "closed" or in the position. This allows the SN7 4154
decoder to be activated only V'!hen there is a match between address
bits Al5-A8 and the bits preset at the HI dip-switch and a match
address bits A7-A4 and the bits preset a1: the LO
addresses between XXXXXXXX XXXXOOOO and XXXXXXXX
are accessible, where X=l or 0. These decoded addresses
present as logic ze:ro pulses at the "ADDRESS" socket ( IC-20) .
nc;u1c'""-''"'' that the first eight addresses in a selected 16-address
are available. Thus, if 10000001 is set for the HI address and
is set for the LO address (bits A 7 -A 4) , addresses 33248 through
would generate logic zero pulses at pins 1 through 8 at the
socket, respectively. Keep in mind that the SN74154
decoder decodes all 16 addresses; you only have access to the "lower"
!l'ir. 11c-:m) !Dle$ngnii%knll s74154 0,,11,,,,; p;,.
1,16 ()
2, 15 1 2
2 3
4,13 3 4
5,12 4 5
6,11 5 6
7,10 6 7
8,9 7 8
3,14
:·:'/:. Connections for address-bus lines A3-AO (unbuffered) are avail­
"" '"""'v on the breadboard at pins 8-5, respectively, on the socket at
These signals may be used in some experiments, but caution
required, since these signals are not buffered, and present a direct
to the Apple computer.
address decoder section of the breadboard will save you a
deal of time and effort, because you will not have to construct
address decoder circuits when you wish to implement I/ 0
or try some simple interface circuits.
Two 8216 noninverting bus buffer chips, IC-10 and IC-11, have
used to buffer the bus, as shown in Fig. 5-5. This means that the
is available with a foll fan-out of 30 (it can power 30 standard
-type inputs) and that it is isolated from the Apple data bus.
e eight bits on the data bus are available at the socket at IC-18.
The information in Table 5-3 shows the connections to the data
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