titus-larsen-titus-1981-apple-interfacing

Since the SN74154 decoders have two enabling inputs, GI and
the NOR gates shown in Fig. 2-15 may be eliminated by using
second enabling input as the "qualifier" that will enable the decoder.
The use of this type of circuit is shown in Fig. 2-16. In this example,
the lower decoder now has two enabling input signals, the RD control
signal from the computer, and the enabling signal from the up"
per portion of the circuit. You should note that the upper decoder
has both of its enabling inputs used, so that it is enabled only for a
specific pattern of bits on the HI address bus. In this case, gating has
been used to generate the enabling signal for the upper decoder.
A third decoder could be added to this circuit to generate device
select pulses for output devices. The inputs to this additional decoder
would be the same as those to the lower decoder, except - that the WR
signal would be used instead of the RD signal.
Many decoder schemes are possible, and you will have an opporh.mity
to explore the use of decoders in the experiments. The main
point is that the use of decoders simplifies the process of device selection
and gating. Decoders are generally used in situations that require
flexibility and the generation of several device select or device
address signals in proximity to one another.
Al5
Al4
Al3
Al2
All
AlO
A9
A8
A7
A6
A5
A4
/
SN7 404 (ALL)
SN74154
G2 15
GI
D
G 2
B 1
A 0
SN74154
G2 15
iiD --! Gl
A3 --o
A2
Al --1
AO --o
D 3
c 2
B
l
A 0 l
16
INPUT
DEVICE SELEG I
PULSES